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From: Tomi Valkeinen <tomi.valkeinen@ti.com>
To: Kevin Hilman <khilman@ti.com>
Cc: linux-omap@vger.kernel.org, Paul Walmsley <paul@pwsan.com>,
	archit@ti.com
Subject: Re: [PATCH 2/2] OMAPDSS: Ensure OPP100 when DSS is operational
Date: Wed, 18 Apr 2012 16:13:35 +0300	[thread overview]
Message-ID: <1334754815.2027.34.camel@deskari> (raw)
In-Reply-To: <1331707131.1618.7.camel@lappy>

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Ping.

 Tomi

On Wed, 2012-03-14 at 08:38 +0200, Tomi Valkeinen wrote:
> On Tue, 2012-03-13 at 11:37 -0700, Kevin Hilman wrote:
> > Hi Tomi,
> > 
> > Tomi Valkeinen <tomi.valkeinen@ti.com> writes:
> > 
> > > Hi Kevin, Paul,
> > >
> > > I know you're busy, but I'd appreciate a comment/ack on these two small
> > > patches, so I could get them in to next merge window. Otherwise using
> > > any other OPP than OPP100 will most likely break the DSS.
> > >
> > > This looks quite straightforward fix for me, but I'm not sure if there
> > > could be any side effects.
> > 
> > How does it affect OMAP3?  OPP50/OPP100 names are specific to OMAP4.
> 
> They are? At least 3630 TRM speaks of them in the DSS chapter.
> 
> > Also, Can you help us understand the exact nature of the constraint?
> 
> The TRM lists maximum clock rates for the DSS clocks. You should be able
> to find them by searching "OPP100" in the DSS chapter. In my TRMs there
> are:
> 
> OMAP3630: Table 7-19. Display Subsystem Clocks
> OMAP4430: Table 10-4. DSS Clock Frequencies
> 
> > It sounds to me like it acutally is a throughput constraint on CORE.  If
> > so, wouldn't it be clearer to set a throughput constraint that is
> > calculated based on the pixel clock and resulting bitrate that would
> > have the same effect?
> 
> I don't see that these limits would have anything to do with CORE. I'm
> guessing that the DSS HW just can't function properly with high clocks
> and low voltage.
> 
> Making a constraint for the throughput is another matter, which should
> be also fixed at some point. So in the future I hope we'll have PM
> constraints coming from two sources: 1) a calculation based on the
> memory throughput needs 2) the minimum clock rates.
> 
> But both of those are non-trivial to code, so this patch aims to keep
> DSS working until those are implemented. Also, in practice, it's quite
> rare that the DSS clocks would all be below the limits in the tables.
> That could only happen with a fixed, known configuration with rather
> small displays.
> 
>  Tomi
> 
> 


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  reply	other threads:[~2012-04-18 13:13 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-08 11:13 [PATCH 1/2] OMAPDSS: add set_min_bus_tput pointer to omapdss's platform data Tomi Valkeinen
2012-03-08 11:13 ` [PATCH 2/2] OMAPDSS: Ensure OPP100 when DSS is operational Tomi Valkeinen
2012-03-13 13:45   ` Tomi Valkeinen
     [not found]     ` <87zkbkmjo1.fsf@ti.com>
2012-03-14  6:38       ` Tomi Valkeinen
2012-04-18 13:13         ` Tomi Valkeinen [this message]
2012-04-18 17:03         ` Kevin Hilman
2012-04-18 17:26           ` Turquette, Mike
2012-04-19  5:06             ` Tomi Valkeinen
2012-04-19 19:56               ` Turquette, Mike
2012-04-19  5:03           ` Tomi Valkeinen
2012-04-19 14:00             ` Kevin Hilman

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