From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: IBX has a fixed pch pll to pch pipe mapping Date: Sun, 20 May 2012 18:16:34 +0100 Message-ID: <1337534198_142667@CP5-2952> References: <1337532909-18452-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id D7E7F9E78C for ; Sun, 20 May 2012 10:16:49 -0700 (PDT) In-Reply-To: <1337532909-18452-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Intel Graphics Development Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org On Sun, 20 May 2012 18:55:09 +0200, Daniel Vetter wrote: > This should fix breakage introduced in > > commit ee7b9f93fd96a72e5d09e2b44024c11880873c6b > Author: Jesse Barnes > Date: Fri Apr 20 17:11:53 2012 +0100 > > drm/i915: manage PCH PLLs separately from pipes > > Cc: Jesse Barnes > Cc: Chris Wilson > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49712 > Signed-Off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/intel_display.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index f3d39f4..f4b2ce9 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2911,6 +2911,14 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3 > goto prepare; > } > > + if (HAS_PCH_IBX(dev_priv->dev)) { Aside from the debate we had whether HAS_PCH_IBX or !HAS_PCH_CPT was more appropriate considering the later switching on HAS_PCH_CPT for selectable DPLLs... > + /* Ironlake PCH has a fixed PLL->PCH pipe mapping. */ > + i = intel_crtc->pipe; > + pll = &dev_priv->pch_plls[i]; DRM_DEBUG_KMS("CRTC:%d pre-allocated PCH PLL %x\n", intel_crtc->base.base.id, pll->pll_reg); so that we have a consistent DEBUG story along all paths. I should have spotted that much earlier, Reviewed-by: Chris Wilson -Chris -- Chris Wilson, Intel Open Source Technology Centre