From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755757Ab2FFKhG (ORCPT ); Wed, 6 Jun 2012 06:37:06 -0400 Received: from merlin.infradead.org ([205.233.59.134]:45179 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752300Ab2FFKhF convert rfc822-to-8bit (ORCPT ); Wed, 6 Jun 2012 06:37:05 -0400 Message-ID: <1338979012.2749.90.camel@twins> Subject: Re: [PATCH] perf, x86: Fix Intel shared extra MSR allocation From: Peter Zijlstra To: Stephane Eranian Cc: linux-kernel@vger.kernel.org, zheng.z.yan@linux.intel.com Date: Wed, 06 Jun 2012 12:36:52 +0200 In-Reply-To: References: <20120605213527.GA5019@quad> Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7BIT X-Mailer: Evolution 3.2.2- Mime-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2012-06-06 at 12:35 +0200, Stephane Eranian wrote: > Ok, I found the problem. It was in intel_fixup_er(). > Unlike in the original code, this routine must update > the event->extra_reg.idx to the idx parameter instead > of trying to swap out from it. Ah indeed. Thanks!