From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <andi@firstfloor.org>,
linux-kernel@vger.kernel.org, eranian@google.com
Subject: Re: [PATCH 5/5] perf, x86: Prefer RDPMC over RDMSR for reading counters
Date: Wed, 06 Jun 2012 16:21:12 +0200 [thread overview]
Message-ID: <1338992472.2749.116.camel@twins> (raw)
In-Reply-To: <20120606141644.GF28225@tassilo.jf.intel.com>
On Wed, 2012-06-06 at 07:16 -0700, Andi Kleen wrote:
> On Wed, Jun 06, 2012 at 12:46:19PM +0200, Peter Zijlstra wrote:
> > On Tue, 2012-06-05 at 17:56 -0700, Andi Kleen wrote:
> > > From: Andi Kleen <ak@linux.intel.com>
> > >
> > > RDPMC is much faster than RDMSR for reading performance counters,
> > > since it's not serializing. Use it if possible in the perf handler.
> > >
> > > Only tested on Sandy Bridge, so I only enabled it there so far.
> >
> > That's just stupid.. I took Vince's patch from a while back.
>
> What do you mean? It's significantly faster to read the counters this
> way, because it avoids serialization and other overhead.
What I'm saying is you only enabling it for snb and being too lazy to
test anything else. Nor do I think its worth the conditional, all chips
we have PMU support for have rdpmc instructions.
> Vince's patch only enabled it for user space I believe, This is for lowering
> the kernel PMI handler overhead.
No, his patch did the kernel thing. Furthermore he actually tested it on
a bunch of machines.
next prev parent reply other threads:[~2012-06-06 14:21 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-06 0:56 [PATCH 1/5] perf, x86: Don't assume the alternative cycles encoding is architectural Andi Kleen
2012-06-06 0:56 ` [PATCH 2/5] perf, x86: Don't assume there can be only 4 PEBS events Andi Kleen
2012-06-06 15:00 ` Peter Zijlstra
2012-06-06 16:10 ` Andi Kleen
2012-06-06 17:25 ` Peter Zijlstra
2012-06-06 16:17 ` [tip:perf/core] perf/x86: Don' t " tip-bot for Andi Kleen
2012-06-06 0:56 ` [PATCH 3/5] perf, x86: Check LBR format capability Andi Kleen
2012-06-06 4:29 ` Andi Kleen
2012-06-06 10:40 ` Peter Zijlstra
2012-06-06 14:14 ` Andi Kleen
2012-06-06 14:22 ` Peter Zijlstra
2012-06-06 14:37 ` Andi Kleen
2012-06-06 0:56 ` [PATCH 4/5] x86: Add rdpmcl() Andi Kleen
2012-06-06 16:16 ` [tip:perf/core] " tip-bot for Andi Kleen
2012-06-06 0:56 ` [PATCH 5/5] perf, x86: Prefer RDPMC over RDMSR for reading counters Andi Kleen
2012-06-06 10:46 ` Peter Zijlstra
2012-06-06 14:16 ` Andi Kleen
2012-06-06 14:21 ` Peter Zijlstra [this message]
2012-06-06 14:33 ` Stephane Eranian
2012-06-06 14:38 ` Peter Zijlstra
2012-06-06 14:41 ` Andi Kleen
2012-06-06 14:45 ` Peter Zijlstra
2012-06-06 10:39 ` [PATCH 1/5] perf, x86: Don't assume the alternative cycles encoding is architectural Peter Zijlstra
2012-06-06 14:12 ` Andi Kleen
2012-06-06 14:14 ` Peter Zijlstra
2012-06-06 14:23 ` Andi Kleen
2012-06-06 14:28 ` Peter Zijlstra
2012-06-06 14:35 ` Andi Kleen
2012-06-06 14:42 ` Peter Zijlstra
2012-06-06 14:49 ` Andi Kleen
2012-06-06 14:53 ` Peter Zijlstra
2012-06-06 16:08 ` Andi Kleen
2012-06-06 17:10 ` Peter Zijlstra
2012-06-06 17:48 ` Andi Kleen
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