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From: Lars Persson <lars.persson@axis.com>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@gmail.com, Lars Persson <larper@axis.com>
Subject: [Qemu-devel] [PATCH] cris: Fix NMI-flag handling on crisv10.
Date: Thu, 14 Jun 2012 16:23:55 +0200	[thread overview]
Message-ID: <1339683835-13921-1-git-send-email-larper@axis.com> (raw)

- The M-flag is encoded in different bits on cris v10 and cris v32.

Signed-off-by: Lars Persson <larper@axis.com>
---
 cpu-exec.c              |   17 ++++++++++++-----
 target-cris/cpu.h       |    3 ++-
 target-cris/helper.c    |    4 ++--
 target-cris/op_helper.c |    4 ++--
 4 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/cpu-exec.c b/cpu-exec.c
index 83cac93..ce4718f 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -467,11 +467,18 @@ int cpu_exec(CPUArchState *env)
                         do_interrupt(env);
                         next_tb = 0;
                     }
-                    if (interrupt_request & CPU_INTERRUPT_NMI
-                        && (env->pregs[PR_CCS] & M_FLAG)) {
-                        env->exception_index = EXCP_NMI;
-                        do_interrupt(env);
-                        next_tb = 0;
+                    if (interrupt_request & CPU_INTERRUPT_NMI) {
+                        unsigned int m_flag_archval;
+                        if (env->pregs[PR_VR] < 32) {
+                            m_flag_archval = M_FLAG_V10;
+                        } else {
+                            m_flag_archval = M_FLAG_V32;
+                        }
+                        if ((env->pregs[PR_CCS] & m_flag_archval)) {
+                            env->exception_index = EXCP_NMI;
+                            do_interrupt(env);
+                            next_tb = 0;
+	                    }
                     }
 #elif defined(TARGET_M68K)
                     if (interrupt_request & CPU_INTERRUPT_HARD
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 73004af..4f4df6d 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -69,13 +69,14 @@
 
 /* CPU flags.  */
 #define Q_FLAG 0x80000000
-#define M_FLAG 0x40000000
+#define M_FLAG_V32 0x40000000
 #define PFIX_FLAG 0x800      /* CRISv10 Only.  */
 #define F_FLAG_V10 0x400
 #define P_FLAG_V10 0x200
 #define S_FLAG 0x200
 #define R_FLAG 0x100
 #define P_FLAG 0x80
+#define M_FLAG_V10 0x80
 #define U_FLAG 0x40
 #define I_FLAG 0x20
 #define X_FLAG 0x10
diff --git a/target-cris/helper.c b/target-cris/helper.c
index dcc19ef..bfbc29e 100644
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -127,7 +127,7 @@ static void do_interruptv10(CPUCRISState *env)
 		case EXCP_NMI:
 			/* NMI is hardwired to vector zero.  */
 			ex_vec = 0;
-			env->pregs[PR_CCS] &= ~M_FLAG;
+			env->pregs[PR_CCS] &= ~M_FLAG_V10;
 			env->pregs[PRV10_BRP] = env->pc;
 			break;
 
@@ -185,7 +185,7 @@ void do_interrupt(CPUCRISState *env)
 		case EXCP_NMI:
 			/* NMI is hardwired to vector zero.  */
 			ex_vec = 0;
-			env->pregs[PR_CCS] &= ~M_FLAG;
+			env->pregs[PR_CCS] &= ~M_FLAG_V32;
 			env->pregs[PR_NRP] = env->pc;
 			break;
 
diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
index b92c106..ac7c98c 100644
--- a/target-cris/op_helper.c
+++ b/target-cris/op_helper.c
@@ -247,8 +247,8 @@ void helper_rfn(void)
 	if (!rflag)
 		env->pregs[PR_CCS] |= P_FLAG;
 
-    /* Always set the M flag.  */
-    env->pregs[PR_CCS] |= M_FLAG;
+	/* Always set the M flag.  */
+	env->pregs[PR_CCS] |= M_FLAG_V32;
 }
 
 uint32_t helper_lz(uint32_t t0)
-- 
1.7.2.5

             reply	other threads:[~2012-06-15  9:46 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-14 14:23 Lars Persson [this message]
2012-06-15 11:26 ` [Qemu-devel] [PATCH] cris: Fix NMI-flag handling on crisv10 Edgar E. Iglesias

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