From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dave Airlie Subject: [PATCH 1/3] drm: introduce pcie gen2 link speed check Date: Tue, 26 Jun 2012 15:50:47 +0100 Message-ID: <1340722249-27052-1-git-send-email-airlied@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail10.svc.cra.dublin.eircom.net (mail10.svc.cra.dublin.eircom.net [159.134.118.26]) by gabe.freedesktop.org (Postfix) with SMTP id EC20B9EB2C for ; Tue, 26 Jun 2012 07:55:25 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org From: Dave Airlie PCI express gen2.0 can support 5GT link speeds, this add code to decide if this can be used for the device. We currently disable it for via/serverengines root ports due to known issues. Signed-off-by: Dave Airlie --- drivers/gpu/drm/drm_pci.c | 37 +++++++++++++++++++++++++++++++++++++ include/drm/drmP.h | 2 +- 2 files changed, 38 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c index 13f3d93..e4918de 100644 --- a/drivers/gpu/drm/drm_pci.c +++ b/drivers/gpu/drm/drm_pci.c @@ -465,3 +465,40 @@ void drm_pci_exit(struct drm_driver *driver, struct pci_driver *pdriver) DRM_INFO("Module unloaded\n"); } EXPORT_SYMBOL(drm_pci_exit); + +int drm_pcie_is_5gt_link_speed_capable(struct drm_device *dev) +{ + struct pci_dev *root; + int pos; + u32 reg32; + + if (!dev->pdev) + return -EINVAL; + + if (!pci_is_pcie(dev->pdev)) + return -EINVAL; + + root = dev->pdev->bus->self; + + pos = pci_pcie_cap(root); + if (!pos) + return -EINVAL; + + pci_read_config_dword(root, pos + PCI_EXP_LNKCAP, ®32); + + reg32 &= PCI_EXP_LNKCAP_SLS; + + /* we've been informed via and serverworks don't make the cut */ + if (root->vendor == PCI_VENDOR_ID_VIA || root->vendor == PCI_VENDOR_ID_SERVERWORKS) + return -EINVAL; + + DRM_INFO("probing gen 2 caps for device %x:%x = %x\n", root->vendor, root->device, reg32); + if (reg32 == 0x1) + return -EINVAL; + + if (reg32 == 0x2) + return 0; + + return -EINVAL; +} +EXPORT_SYMBOL(drm_pcie_is_5gt_link_speed_capable); diff --git a/include/drm/drmP.h b/include/drm/drmP.h index 31ad880..57d3e85 100644 --- a/include/drm/drmP.h +++ b/include/drm/drmP.h @@ -1760,7 +1760,7 @@ extern void drm_pci_exit(struct drm_driver *driver, struct pci_driver *pdriver); extern int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent, struct drm_driver *driver); - +extern int drm_pcie_is_5gt_link_speed_capable(struct drm_device *dev); /* platform section */ extern int drm_platform_init(struct drm_driver *driver, struct platform_device *platform_device); -- 1.7.7.6