From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Glass Date: Thu, 12 Jul 2012 08:25:15 -0700 Subject: [U-Boot] [PATCH v3 15/18] tegra: Support control of cache settings for LCD In-Reply-To: <1342106718-3058-1-git-send-email-sjg@chromium.org> References: <1342106718-3058-1-git-send-email-sjg@chromium.org> Message-ID: <1342106718-3058-16-git-send-email-sjg@chromium.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add support for selecting the required cache mode for the LCD: off, write-through or write-back. Signed-off-by: Simon Glass --- Changes in v3: - Handle a cached frame buffer out of normal U-Boot memory drivers/video/tegra.c | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c index 25ff64f..2f6655a 100644 --- a/drivers/video/tegra.c +++ b/drivers/video/tegra.c @@ -145,6 +145,7 @@ static void update_panel_size(struct fdt_disp_config *config) void lcd_ctrl_init(void *lcdbase) { int line_length, size; + int type = DCACHE_OFF; assert(disp_config); @@ -160,6 +161,16 @@ void lcd_ctrl_init(void *lcdbase) update_panel_size(disp_config); size = lcd_get_size(&line_length); + /* Set up the LCD caching as requested */ + if (config.cache_type & FDT_LCD_CACHE_WRITE_THROUGH) + type = DCACHE_WRITETHROUGH; + else if (config.cache_type & FDT_LCD_CACHE_WRITE_BACK) + type = DCACHE_WRITEBACK; + mmu_set_region_dcache(disp_config->frame_buffer, size, type); + + /* Enable flushing after LCD writes if requested */ + lcd_set_flush_dcache(config.cache_type & FDT_LCD_CACHE_FLUSH); + debug("LCD frame buffer at %p\n", lcd_base); } -- 1.7.7.3