diff for duplicates of <1344389967-8465-2-git-send-email-linux@prisktech.co.nz> diff --git a/a/1.txt b/N1/1.txt index 302b5c7..2300f8e 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. -Signed-off-by: Tony Prisk <linux@prisktech.co.nz> +Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> --- arch/arm/boot/dts/vt8500.dtsi | 99 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/vt8500_ref.dts | 31 ++++++++++ @@ -26,7 +26,7 @@ index 0000000..7a2fe0e +/* + * vt8500.dtsi - Device tree file for VIA VT8500 SoC + * -+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> ++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> + * + * Licensed under GPLv2 or later + */ @@ -131,7 +131,7 @@ index 0000000..ba5a6af +/* + * vt8500_ref.dts - Device tree file for Benign BV07 Netbook + * -+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> ++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> + * + * Licensed under GPLv2 or later + */ @@ -168,7 +168,7 @@ index 0000000..76dbfdc +/* + * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC + * -+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> ++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> + * + * Licensed under GPLv2 or later + */ @@ -299,7 +299,7 @@ index 0000000..3df6fbb +/* + * wm8505_ref.dts - Device tree file for Wondermedia WM8505 reference board + * -+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> ++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> + * + * Licensed under GPLv2 or later + */ @@ -336,7 +336,7 @@ index 0000000..fab4ead +/* + * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC + * -+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> ++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> + * + * Licensed under GPLv2 or later + */ @@ -437,7 +437,7 @@ index 0000000..3313006 +/* + * wm8650_ref.dts - Device tree file for Wondermedia WM8650 reference board + * -+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> ++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> + * + * Licensed under GPLv2 or later + */ diff --git a/a/content_digest b/N1/content_digest index 027a32d..2c7bbc3 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,14 +1,37 @@ "ref\01344389967-8465-1-git-send-email-linux@prisktech.co.nz\0" - "From\0Tony Prisk <linux@prisktech.co.nz>\0" + "ref\01344389967-8465-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org\0" + "From\0Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\0" "Subject\0[PATCH 1/8] arm: vt8500: Add device tree files for VIA/Wondermedia SoC's\0" - "Date\0Wed, 08 Aug 2012 01:39:19 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "Date\0Wed, 8 Aug 2012 13:39:19 +1200\0" + "To\0vt8500-wm8505-linux-kernel-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org\0" + "Cc\0linux-fbdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" + linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> + rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org + Florian Tobias Schandinat <FlorianSchandinat-Mmb7MZpHnFY@public.gmane.org> + Alan Stern <stern-nwvwT67g6+6dFdvTe/nMLpVzexx5G7lz@public.gmane.org> + Eric Andersson <eric.andersson-TStm8jYLEPpl57MIdRCFDg@public.gmane.org> + linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> + devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org + Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> + Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> + Neil Zhang <zhangwm-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org> + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + Alan Cox <alan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> + Alessandro Zummo <a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org> + Linus Walleij <linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org> + Greg Kroah-Hartman <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org> + Mark Brown <broonie-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org> + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org>\0" "\00:1\0" "b\0" "Add device tree files for VT8500, WM8505 and WM8650 SoC's and\n" "reference boards.\n" "\n" - "Signed-off-by: Tony Prisk <linux@prisktech.co.nz>\n" + "Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "---\n" " arch/arm/boot/dts/vt8500.dtsi | 99 ++++++++++++++++++++++++++++++\n" " arch/arm/boot/dts/vt8500_ref.dts | 31 ++++++++++\n" @@ -33,7 +56,7 @@ "+/*\n" "+ * vt8500.dtsi - Device tree file for VIA VT8500 SoC\n" "+ *\n" - "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n" + "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "+ *\n" "+ * Licensed under GPLv2 or later\n" "+ */\n" @@ -138,7 +161,7 @@ "+/*\n" "+ * vt8500_ref.dts - Device tree file for Benign BV07 Netbook\n" "+ *\n" - "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n" + "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "+ *\n" "+ * Licensed under GPLv2 or later\n" "+ */\n" @@ -175,7 +198,7 @@ "+/*\n" "+ * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC\n" "+ *\n" - "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n" + "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "+ *\n" "+ * Licensed under GPLv2 or later\n" "+ */\n" @@ -306,7 +329,7 @@ "+/*\n" "+ * wm8505_ref.dts - Device tree file for Wondermedia WM8505 reference board\n" "+ *\n" - "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n" + "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "+ *\n" "+ * Licensed under GPLv2 or later\n" "+ */\n" @@ -343,7 +366,7 @@ "+/*\n" "+ * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC\n" "+ *\n" - "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n" + "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "+ *\n" "+ * Licensed under GPLv2 or later\n" "+ */\n" @@ -444,7 +467,7 @@ "+/*\n" "+ * wm8650_ref.dts - Device tree file for Wondermedia WM8650 reference board\n" "+ *\n" - "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n" + "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "+ *\n" "+ * Licensed under GPLv2 or later\n" "+ */\n" @@ -475,4 +498,4 @@ "-- \n" 1.7.9.5 -5762cf704b64a4d7c2a754dfe9e565cf95f3a2880230050f163b2f72a7e693d1 +99285efd52f4c73cdcf1b75258bed61a95942153ca7fc89fd9f1b0f270cf9933
diff --git a/a/1.txt b/N2/1.txt index 302b5c7..69d232a 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -43,79 +43,79 @@ index 0000000..7a2fe0e + ranges; + interrupt-parent = <&intc>; + -+ intc: interrupt-controller@d8140000 { ++ intc: interrupt-controller at d8140000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + reg = <0xd8140000 0x10000>; + #interrupt-cells = <1>; + }; + -+ gpio: gpio-controller@d8110000 { ++ gpio: gpio-controller at d8110000 { + compatible = "via,vt8500-gpio"; + gpio-controller; + reg = <0xd8110000 0x10000>; + #gpio-cells = <3>; + }; + -+ pmc@d8130000 { ++ pmc at d8130000 { + compatible = "via,vt8500-pmc"; + reg = <0xd8130000 0x1000>; + }; + -+ timer@d8130100 { ++ timer at d8130100 { + compatible = "via,vt8500-timer"; + reg = <0xd8130100 0x28>; + interrupts = <36>; + }; + -+ ehci@d8007900 { ++ ehci at d8007900 { + compatible = "via,vt8500-ehci"; + reg = <0xd8007900 0x200>; + interrupts = <43>; + }; + -+ uhci@d8007b00 { ++ uhci at d8007b00 { + compatible = "platform-uhci"; + reg = <0xd8007b00 0x200>; + interrupts = <43>; + }; + -+ fb@d800e400 { ++ fb at d800e400 { + compatible = "via,vt8500-fb"; + reg = <0xd800e400 0x400>; + interrupts = <12>; + }; + -+ ge_rops@d8050400 { ++ ge_rops at d8050400 { + compatible = "wm,prizm-ge-rops"; + reg = <0xd8050400 0x100>; + }; + -+ uart@d8200000 { ++ uart at d8200000 { + compatible = "via,vt8500-uart"; + reg = <0xd8200000 0x1040>; + interrupts = <32>; + }; + -+ uart@d82b0000 { ++ uart at d82b0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82b0000 0x1040>; + interrupts = <33>; + }; + -+ uart@d8210000 { ++ uart at d8210000 { + compatible = "via,vt8500-uart"; + reg = <0xd8210000 0x1040>; + interrupts = <47>; + }; + -+ uart@d82c0000 { ++ uart at d82c0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82c0000 0x1040>; + interrupts = <50>; + }; + -+ rtc@d8100000 { ++ rtc at d8100000 { + compatible = "via,vt8500-rtc"; + reg = <0xd8100000 0x10000>; + interrupts = <48>; @@ -179,7 +179,7 @@ index 0000000..76dbfdc + compatible = "wm,wm8505"; + + cpus { -+ cpu@0 { ++ cpu at 0 { + compatible = "arm,arm926ejs"; + }; + }; @@ -191,7 +191,7 @@ index 0000000..76dbfdc + ranges; + interrupt-parent = <&intc0>; + -+ intc0: interrupt-controller@d8140000 { ++ intc0: interrupt-controller at d8140000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + reg = <0xd8140000 0x10000>; @@ -199,7 +199,7 @@ index 0000000..76dbfdc + }; + + /* Secondary IC cascaded to intc0 */ -+ intc1: interrupt-controller@d8150000 { ++ intc1: interrupt-controller at d8150000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + #interrupt-cells = <1>; @@ -207,83 +207,83 @@ index 0000000..76dbfdc + interrupts = <56 57 58 59 60 61 62 63>; + }; + -+ gpio: gpio-controller@d8110000 { ++ gpio: gpio-controller at d8110000 { + compatible = "wm,wm8505-gpio"; + gpio-controller; + reg = <0xd8110000 0x10000>; + #gpio-cells = <3>; + }; + -+ pmc@d8130000 { ++ pmc at d8130000 { + compatible = "via,vt8500-pmc"; + reg = <0xd8130000 0x1000>; + }; + -+ timer@d8130100 { ++ timer at d8130100 { + compatible = "via,vt8500-timer"; + reg = <0xd8130100 0x28>; + interrupts = <36>; + }; + -+ ehci@d8007100 { ++ ehci at d8007100 { + compatible = "via,vt8500-ehci"; + reg = <0xd8007100 0x200>; + interrupts = <43>; + }; + -+ uhci@d8007300 { ++ uhci at d8007300 { + compatible = "platform-uhci"; + reg = <0xd8007300 0x200>; + interrupts = <43>; + }; + -+ fb@d8050800 { ++ fb at d8050800 { + compatible = "wm,wm8505-fb"; + reg = <0xd8050800 0x200>; + }; + -+ ge_rops@d8050400 { ++ ge_rops at d8050400 { + compatible = "wm,prizm-ge-rops"; + reg = <0xd8050400 0x100>; + }; + -+ uart@d8200000 { ++ uart at d8200000 { + compatible = "via,vt8500-uart"; + reg = <0xd8200000 0x1040>; + interrupts = <32>; + }; + -+ uart@d82b0000 { ++ uart at d82b0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82b0000 0x1040>; + interrupts = <33>; + }; + -+ uart@d8210000 { ++ uart at d8210000 { + compatible = "via,vt8500-uart"; + reg = <0xd8210000 0x1040>; + interrupts = <47>; + }; + -+ uart@d82c0000 { ++ uart at d82c0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82c0000 0x1040>; + interrupts = <50>; + }; + -+ uart@d8370000 { ++ uart at d8370000 { + compatible = "via,vt8500-uart"; + reg = <0xd8370000 0x1040>; + interrupts = <31>; + }; + -+ uart@d8380000 { ++ uart at d8380000 { + compatible = "via,vt8500-uart"; + reg = <0xd8380000 0x1040>; + interrupts = <30>; + }; + -+ rtc@d8100000 { ++ rtc at d8100000 { + compatible = "via,vt8500-rtc"; + reg = <0xd8100000 0x10000>; + interrupts = <48>; @@ -353,7 +353,7 @@ index 0000000..fab4ead + ranges; + interrupt-parent = <&intc0>; + -+ intc0: interrupt-controller@d8140000 { ++ intc0: interrupt-controller at d8140000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + reg = <0xd8140000 0x10000>; @@ -361,7 +361,7 @@ index 0000000..fab4ead + }; + + /* Secondary IC cascaded to intc0 */ -+ intc1: interrupt-controller@d8150000 { ++ intc1: interrupt-controller at d8150000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + #interrupt-cells = <1>; @@ -369,59 +369,59 @@ index 0000000..fab4ead + interrupts = <56 57 58 59 60 61 62 63>; + }; + -+ gpio: gpio-controller@d8110000 { ++ gpio: gpio-controller at d8110000 { + compatible = "wm,wm8650-gpio"; + gpio-controller; + reg = <0xd8110000 0x10000>; + #gpio-cells = <3>; + }; + -+ pmc@d8130000 { ++ pmc at d8130000 { + compatible = "via,vt8500-pmc"; + reg = <0xd8130000 0x1000>; + }; + -+ timer@d8130100 { ++ timer at d8130100 { + compatible = "via,vt8500-timer"; + reg = <0xd8130100 0x28>; + interrupts = <36>; + }; + -+ ehci@d8007900 { ++ ehci at d8007900 { + compatible = "via,vt8500-ehci"; + reg = <0xd8007900 0x200>; + interrupts = <43>; + }; + -+ uhci@d8007b00 { ++ uhci at d8007b00 { + compatible = "platform-uhci"; + reg = <0xd8007b00 0x200>; + interrupts = <43>; + }; + -+ fb@d8050800 { ++ fb at d8050800 { + compatible = "wm,wm8505-fb"; + reg = <0xd8050800 0x200>; + }; + -+ ge_rops@d8050400 { ++ ge_rops at d8050400 { + compatible = "wm,prizm-ge-rops"; + reg = <0xd8050400 0x100>; + }; + -+ uart@d8200000 { ++ uart at d8200000 { + compatible = "via,vt8500-uart"; + reg = <0xd8200000 0x1040>; + interrupts = <32>; + }; + -+ uart@d82b0000 { ++ uart at d82b0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82b0000 0x1040>; + interrupts = <33>; + }; + -+ rtc@d8100000 { ++ rtc at d8100000 { + compatible = "via,vt8500-rtc"; + reg = <0xd8100000 0x10000>; + interrupts = <48>; diff --git a/a/content_digest b/N2/content_digest index 027a32d..4558ff3 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,7 +1,7 @@ "ref\01344389967-8465-1-git-send-email-linux@prisktech.co.nz\0" - "From\0Tony Prisk <linux@prisktech.co.nz>\0" + "From\0linux@prisktech.co.nz (Tony Prisk)\0" "Subject\0[PATCH 1/8] arm: vt8500: Add device tree files for VIA/Wondermedia SoC's\0" - "Date\0Wed, 08 Aug 2012 01:39:19 +0000\0" + "Date\0Wed, 8 Aug 2012 13:39:19 +1200\0" "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" @@ -50,79 +50,79 @@ "+\t\tranges;\n" "+\t\tinterrupt-parent = <&intc>;\n" "+\n" - "+\t\tintc: interrupt-controller@d8140000 {\n" + "+\t\tintc: interrupt-controller at d8140000 {\n" "+\t\t\tcompatible = \"via,vt8500-intc\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\treg = <0xd8140000 0x10000>;\n" "+\t\t\t#interrupt-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tgpio: gpio-controller@d8110000 {\n" + "+\t\tgpio: gpio-controller at d8110000 {\n" "+\t\t\tcompatible = \"via,vt8500-gpio\";\n" "+\t\t\tgpio-controller;\n" "+\t\t\treg = <0xd8110000 0x10000>;\n" "+\t\t\t#gpio-cells = <3>;\n" "+\t\t};\n" "+\n" - "+\t\tpmc@d8130000 {\n" + "+\t\tpmc at d8130000 {\n" "+\t\t\tcompatible = \"via,vt8500-pmc\";\n" "+\t\t\treg = <0xd8130000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\ttimer@d8130100 {\n" + "+\t\ttimer at d8130100 {\n" "+\t\t\tcompatible = \"via,vt8500-timer\";\n" "+\t\t\treg = <0xd8130100 0x28>;\n" "+\t\t\tinterrupts = <36>;\n" "+\t\t};\n" "+\n" - "+\t\tehci@d8007900 {\n" + "+\t\tehci at d8007900 {\n" "+\t\t\tcompatible = \"via,vt8500-ehci\";\n" "+\t\t\treg = <0xd8007900 0x200>;\n" "+\t\t\tinterrupts = <43>;\n" "+\t\t};\n" "+\n" - "+\t\tuhci@d8007b00 {\n" + "+\t\tuhci at d8007b00 {\n" "+\t\t\tcompatible = \"platform-uhci\";\n" "+\t\t\treg = <0xd8007b00 0x200>;\n" "+\t\t\tinterrupts = <43>;\n" "+\t\t};\n" "+\n" - "+\t\tfb@d800e400 {\n" + "+\t\tfb at d800e400 {\n" "+\t\t\tcompatible = \"via,vt8500-fb\";\n" "+\t\t\treg = <0xd800e400 0x400>;\n" "+\t\t\tinterrupts = <12>;\n" "+\t\t};\n" "+\n" - "+\t\tge_rops@d8050400 {\n" + "+\t\tge_rops at d8050400 {\n" "+\t\t\tcompatible = \"wm,prizm-ge-rops\";\n" "+\t\t\treg = <0xd8050400 0x100>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d8200000 {\n" + "+\t\tuart at d8200000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd8200000 0x1040>;\n" "+\t\t\tinterrupts = <32>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d82b0000 {\n" + "+\t\tuart at d82b0000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd82b0000 0x1040>;\n" "+\t\t\tinterrupts = <33>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d8210000 {\n" + "+\t\tuart at d8210000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd8210000 0x1040>;\n" "+\t\t\tinterrupts = <47>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d82c0000 {\n" + "+\t\tuart at d82c0000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd82c0000 0x1040>;\n" "+\t\t\tinterrupts = <50>;\n" "+\t\t};\n" "+\n" - "+\t\trtc@d8100000 {\n" + "+\t\trtc at d8100000 {\n" "+\t\t\tcompatible = \"via,vt8500-rtc\";\n" "+\t\t\treg = <0xd8100000 0x10000>;\n" "+\t\t\tinterrupts = <48>;\n" @@ -186,7 +186,7 @@ "+\tcompatible = \"wm,wm8505\";\n" "+\n" "+\tcpus {\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tcompatible = \"arm,arm926ejs\";\n" "+\t\t};\n" "+\t};\n" @@ -198,7 +198,7 @@ "+\t\tranges;\n" "+\t\tinterrupt-parent = <&intc0>;\n" "+\n" - "+\t\tintc0: interrupt-controller@d8140000 {\n" + "+\t\tintc0: interrupt-controller at d8140000 {\n" "+\t\t\tcompatible = \"via,vt8500-intc\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\treg = <0xd8140000 0x10000>;\n" @@ -206,7 +206,7 @@ "+\t\t};\n" "+\n" "+\t\t/* Secondary IC cascaded to intc0 */\n" - "+\t\tintc1: interrupt-controller@d8150000 {\n" + "+\t\tintc1: interrupt-controller at d8150000 {\n" "+\t\t\tcompatible = \"via,vt8500-intc\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\t#interrupt-cells = <1>;\n" @@ -214,83 +214,83 @@ "+\t\t\tinterrupts = <56 57 58 59 60 61 62 63>;\n" "+\t\t};\n" "+\n" - "+\t\tgpio: gpio-controller@d8110000 {\n" + "+\t\tgpio: gpio-controller at d8110000 {\n" "+\t\t\tcompatible = \"wm,wm8505-gpio\";\n" "+\t\t\tgpio-controller;\n" "+\t\t\treg = <0xd8110000 0x10000>;\n" "+\t\t\t#gpio-cells = <3>;\n" "+\t\t};\n" "+\n" - "+\t\tpmc@d8130000 {\n" + "+\t\tpmc at d8130000 {\n" "+\t\t\tcompatible = \"via,vt8500-pmc\";\n" "+\t\t\treg = <0xd8130000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\ttimer@d8130100 {\n" + "+\t\ttimer at d8130100 {\n" "+\t\t\tcompatible = \"via,vt8500-timer\";\n" "+\t\t\treg = <0xd8130100 0x28>;\n" "+\t\t\tinterrupts = <36>;\n" "+\t\t};\n" "+\n" - "+\t\tehci@d8007100 {\n" + "+\t\tehci at d8007100 {\n" "+\t\t\tcompatible = \"via,vt8500-ehci\";\n" "+\t\t\treg = <0xd8007100 0x200>;\n" "+\t\t\tinterrupts = <43>;\n" "+\t\t};\n" "+\n" - "+\t\tuhci@d8007300 {\n" + "+\t\tuhci at d8007300 {\n" "+\t\t\tcompatible = \"platform-uhci\";\n" "+\t\t\treg = <0xd8007300 0x200>;\n" "+\t\t\tinterrupts = <43>;\n" "+\t\t};\n" "+\n" - "+\t\tfb@d8050800 {\n" + "+\t\tfb at d8050800 {\n" "+\t\t\tcompatible = \"wm,wm8505-fb\";\n" "+\t\t\treg = <0xd8050800 0x200>;\n" "+\t\t};\n" "+\n" - "+\t\tge_rops@d8050400 {\n" + "+\t\tge_rops at d8050400 {\n" "+\t\t\tcompatible = \"wm,prizm-ge-rops\";\n" "+\t\t\treg = <0xd8050400 0x100>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d8200000 {\n" + "+\t\tuart at d8200000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd8200000 0x1040>;\n" "+\t\t\tinterrupts = <32>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d82b0000 {\n" + "+\t\tuart at d82b0000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd82b0000 0x1040>;\n" "+\t\t\tinterrupts = <33>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d8210000 {\n" + "+\t\tuart at d8210000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd8210000 0x1040>;\n" "+\t\t\tinterrupts = <47>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d82c0000 {\n" + "+\t\tuart at d82c0000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd82c0000 0x1040>;\n" "+\t\t\tinterrupts = <50>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d8370000 {\n" + "+\t\tuart at d8370000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd8370000 0x1040>;\n" "+\t\t\tinterrupts = <31>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d8380000 {\n" + "+\t\tuart at d8380000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd8380000 0x1040>;\n" "+\t\t\tinterrupts = <30>;\n" "+\t\t};\n" "+\n" - "+\t\trtc@d8100000 {\n" + "+\t\trtc at d8100000 {\n" "+\t\t\tcompatible = \"via,vt8500-rtc\";\n" "+\t\t\treg = <0xd8100000 0x10000>;\n" "+\t\t\tinterrupts = <48>;\n" @@ -360,7 +360,7 @@ "+\t\tranges;\n" "+\t\tinterrupt-parent = <&intc0>;\n" "+\n" - "+\t\tintc0: interrupt-controller@d8140000 {\n" + "+\t\tintc0: interrupt-controller at d8140000 {\n" "+\t\t\tcompatible = \"via,vt8500-intc\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\treg = <0xd8140000 0x10000>;\n" @@ -368,7 +368,7 @@ "+\t\t};\n" "+\n" "+\t\t/* Secondary IC cascaded to intc0 */\n" - "+\t\tintc1: interrupt-controller@d8150000 {\n" + "+\t\tintc1: interrupt-controller at d8150000 {\n" "+\t\t\tcompatible = \"via,vt8500-intc\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\t#interrupt-cells = <1>;\n" @@ -376,59 +376,59 @@ "+\t\t\tinterrupts = <56 57 58 59 60 61 62 63>;\n" "+\t\t};\n" "+\n" - "+\t\tgpio: gpio-controller@d8110000 {\n" + "+\t\tgpio: gpio-controller at d8110000 {\n" "+\t\t\tcompatible = \"wm,wm8650-gpio\";\n" "+\t\t\tgpio-controller;\n" "+\t\t\treg = <0xd8110000 0x10000>;\n" "+\t\t\t#gpio-cells = <3>;\n" "+\t\t};\n" "+\n" - "+\t\tpmc@d8130000 {\n" + "+\t\tpmc at d8130000 {\n" "+\t\t\tcompatible = \"via,vt8500-pmc\";\n" "+\t\t\treg = <0xd8130000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\ttimer@d8130100 {\n" + "+\t\ttimer at d8130100 {\n" "+\t\t\tcompatible = \"via,vt8500-timer\";\n" "+\t\t\treg = <0xd8130100 0x28>;\n" "+\t\t\tinterrupts = <36>;\n" "+\t\t};\n" "+\n" - "+\t\tehci@d8007900 {\n" + "+\t\tehci at d8007900 {\n" "+\t\t\tcompatible = \"via,vt8500-ehci\";\n" "+\t\t\treg = <0xd8007900 0x200>;\n" "+\t\t\tinterrupts = <43>;\n" "+\t\t};\n" "+\n" - "+\t\tuhci@d8007b00 {\n" + "+\t\tuhci at d8007b00 {\n" "+\t\t\tcompatible = \"platform-uhci\";\n" "+\t\t\treg = <0xd8007b00 0x200>;\n" "+\t\t\tinterrupts = <43>;\n" "+\t\t};\n" "+\n" - "+\t\tfb@d8050800 {\n" + "+\t\tfb at d8050800 {\n" "+\t\t\tcompatible = \"wm,wm8505-fb\";\n" "+\t\t\treg = <0xd8050800 0x200>;\n" "+\t\t};\n" "+\n" - "+\t\tge_rops@d8050400 {\n" + "+\t\tge_rops at d8050400 {\n" "+\t\t\tcompatible = \"wm,prizm-ge-rops\";\n" "+\t\t\treg = <0xd8050400 0x100>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d8200000 {\n" + "+\t\tuart at d8200000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd8200000 0x1040>;\n" "+\t\t\tinterrupts = <32>;\n" "+\t\t};\n" "+\n" - "+\t\tuart@d82b0000 {\n" + "+\t\tuart at d82b0000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd82b0000 0x1040>;\n" "+\t\t\tinterrupts = <33>;\n" "+\t\t};\n" "+\n" - "+\t\trtc@d8100000 {\n" + "+\t\trtc at d8100000 {\n" "+\t\t\tcompatible = \"via,vt8500-rtc\";\n" "+\t\t\treg = <0xd8100000 0x10000>;\n" "+\t\t\tinterrupts = <48>;\n" @@ -475,4 +475,4 @@ "-- \n" 1.7.9.5 -5762cf704b64a4d7c2a754dfe9e565cf95f3a2880230050f163b2f72a7e693d1 +8a1d09af646a3a4f0e30515a53b13d0c5282c5ab1afba9e45958bcb8b41d56e7
diff --git a/a/content_digest b/N3/content_digest index 027a32d..ba9bc18 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -1,8 +1,34 @@ "ref\01344389967-8465-1-git-send-email-linux@prisktech.co.nz\0" "From\0Tony Prisk <linux@prisktech.co.nz>\0" "Subject\0[PATCH 1/8] arm: vt8500: Add device tree files for VIA/Wondermedia SoC's\0" - "Date\0Wed, 08 Aug 2012 01:39:19 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "Date\0Wed, 8 Aug 2012 13:39:19 +1200\0" + "To\0vt8500-wm8505-linux-kernel@googlegroups.com\0" + "Cc\0Tony Prisk <linux@prisktech.co.nz>" + Russell King <linux@arm.linux.org.uk> + Arnd Bergmann <arnd@arndb.de> + Alessandro Zummo <a.zummo@towertech.it> + Grant Likely <grant.likely@secretlab.ca> + Rob Herring <rob.herring@calxeda.com> + Alan Cox <alan@linux.intel.com> + Greg Kroah-Hartman <gregkh@linuxfoundation.org> + Alan Stern <stern@rowland.harvard.edu> + Hauke Mehrtens <hauke@hauke-m.de> + Felipe Balbi <balbi@ti.com> + Neil Zhang <zhangwm@marvell.com> + Florian Tobias Schandinat <FlorianSchandinat@gmx.de> + Rob Landley <rob@landley.net> + Mark Brown <broonie@opensource.wolfsonmicro.com> + Stephen Warren <swarren@nvidia.com> + Eric Andersson <eric.andersson@unixphere.com> + Linus Walleij <linus.walleij@stericsson.com> + linux-arm-kernel@lists.infradead.org + linux-kernel@vger.kernel.org + linux-doc@vger.kernel.org + linux-fbdev@vger.kernel.org + linux-usb@vger.kernel.org + linux-serial@vger.kernel.org + rtc-linux@googlegroups.com + " devicetree-discuss@lists.ozlabs.org\0" "\00:1\0" "b\0" "Add device tree files for VT8500, WM8505 and WM8650 SoC's and\n" @@ -475,4 +501,4 @@ "-- \n" 1.7.9.5 -5762cf704b64a4d7c2a754dfe9e565cf95f3a2880230050f163b2f72a7e693d1 +559ab3756918db1cf23ee9203c62ebc9d171fec447a9cd563d3fcd526b01ea86
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