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diff for duplicates of <1345707346-9035-2-git-send-email-linux@prisktech.co.nz>

diff --git a/a/1.txt b/N1/1.txt
index 3cae4bd..c70d913 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,7 +1,7 @@
 Add device tree files for VT8500, WM8505 and WM8650 SoC's and
 reference boards.
 
-Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
+Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
 ---
  arch/arm/boot/dts/vt8500-bv07.dts |   31 ++++++++
  arch/arm/boot/dts/vt8500.dtsi     |  115 +++++++++++++++++++++++++++++
@@ -26,7 +26,7 @@ index 0000000..339a664
 +/*
 + * vt8500-bv07.dts - Device tree file for Benign BV07 Netbook
 + *
-+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
 + *
 + * Licensed under GPLv2 or later
 + */
@@ -63,7 +63,7 @@ index 0000000..17a1d0d
 +/*
 + * vt8500.dtsi - Device tree file for VIA VT8500 SoC
 + *
-+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
 + *
 + * Licensed under GPLv2 or later
 + */
@@ -184,7 +184,7 @@ index 0000000..fcd9836
 +/*
 + * wm8505-ref.dts - Device tree file for Wondermedia WM8505 reference netbook
 + *
-+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
 + *
 + * Licensed under GPLv2 or later
 + */
@@ -221,7 +221,7 @@ index 0000000..aa6d492
 +/*
 + * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC
 + *
-+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
 + *
 + * Licensed under GPLv2 or later
 + */
@@ -369,7 +369,7 @@ index 0000000..d37dbf0
 +/*
 + * wm8650-mid.dts - Device tree file for Wondermedia WM8650-MID Tablet
 + *
-+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
 + *
 + * Licensed under GPLv2 or later
 + */
@@ -406,7 +406,7 @@ index 0000000..372a734
 +/*
 + * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
 + *
-+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
 + *
 + * Licensed under GPLv2 or later
 + */
diff --git a/a/content_digest b/N1/content_digest
index 349a496..dd8ccb7 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,14 +1,31 @@
  "ref\01345707346-9035-1-git-send-email-linux@prisktech.co.nz\0"
- "From\0Tony Prisk <linux@prisktech.co.nz>\0"
+ "ref\01345707346-9035-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org\0"
+ "From\0Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\0"
  "Subject\0[PATCHv4 1/9] arm: vt8500: Add device tree files for VIA/Wondermedia SoC's\0"
- "Date\0Thu, 23 Aug 2012 07:35:37 +0000\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "Date\0Thu, 23 Aug 2012 19:35:37 +1200\0"
+ "To\0vt8500-wm8505-linux-kernel-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org\0"
+ "Cc\0Alessandro Zummo <a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org>"
+  linux-fbdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
+  Linus Walleij <linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org>
+  Florian Tobias Schandinat <FlorianSchandinat-Mmb7MZpHnFY@public.gmane.org>
+  Greg Kroah-Hartman <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>
+  devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
+  linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
+  linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
+  Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+  Mike Turquette <mturquette-l0cyMroinI0@public.gmane.org>
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+ " Alan Cox <alan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "Add device tree files for VT8500, WM8505 and WM8650 SoC's and\n"
  "reference boards.\n"
  "\n"
- "Signed-off-by: Tony Prisk <linux@prisktech.co.nz>\n"
+ "Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n"
  "---\n"
  " arch/arm/boot/dts/vt8500-bv07.dts |   31 ++++++++\n"
  " arch/arm/boot/dts/vt8500.dtsi     |  115 +++++++++++++++++++++++++++++\n"
@@ -33,7 +50,7 @@
  "+/*\n"
  "+ * vt8500-bv07.dts - Device tree file for Benign BV07 Netbook\n"
  "+ *\n"
- "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n"
+ "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n"
  "+ *\n"
  "+ * Licensed under GPLv2 or later\n"
  "+ */\n"
@@ -70,7 +87,7 @@
  "+/*\n"
  "+ * vt8500.dtsi - Device tree file for VIA VT8500 SoC\n"
  "+ *\n"
- "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n"
+ "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n"
  "+ *\n"
  "+ * Licensed under GPLv2 or later\n"
  "+ */\n"
@@ -191,7 +208,7 @@
  "+/*\n"
  "+ * wm8505-ref.dts - Device tree file for Wondermedia WM8505 reference netbook\n"
  "+ *\n"
- "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n"
+ "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n"
  "+ *\n"
  "+ * Licensed under GPLv2 or later\n"
  "+ */\n"
@@ -228,7 +245,7 @@
  "+/*\n"
  "+ * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC\n"
  "+ *\n"
- "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n"
+ "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n"
  "+ *\n"
  "+ * Licensed under GPLv2 or later\n"
  "+ */\n"
@@ -376,7 +393,7 @@
  "+/*\n"
  "+ * wm8650-mid.dts - Device tree file for Wondermedia WM8650-MID Tablet\n"
  "+ *\n"
- "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n"
+ "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n"
  "+ *\n"
  "+ * Licensed under GPLv2 or later\n"
  "+ */\n"
@@ -413,7 +430,7 @@
  "+/*\n"
  "+ * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC\n"
  "+ *\n"
- "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n"
+ "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n"
  "+ *\n"
  "+ * Licensed under GPLv2 or later\n"
  "+ */\n"
@@ -559,4 +576,4 @@
  "-- \n"
  1.7.9.5
 
-6393c733136e29817a4cccaae3d260b00590fc56a4d1ebc1b50bdfe828ba01f6
+6143ad862edd69e56da9385887b712360b19bc15aabed9ae2a2e16f60366faff

diff --git a/a/1.txt b/N2/1.txt
index 3cae4bd..d250d34 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -80,21 +80,21 @@ index 0000000..17a1d0d
 +		ranges;
 +		interrupt-parent = <&intc>;
 +
-+		intc: interrupt-controller@d8140000 {
++		intc: interrupt-controller at d8140000 {
 +			compatible = "via,vt8500-intc";
 +			interrupt-controller;
 +			reg = <0xd8140000 0x10000>;
 +			#interrupt-cells = <1>;
 +		};
 +
-+		gpio: gpio-controller@d8110000 {
++		gpio: gpio-controller at d8110000 {
 +			compatible = "via,vt8500-gpio";
 +			gpio-controller;
 +			reg = <0xd8110000 0x10000>;
 +			#gpio-cells = <3>;
 +		};
 +
-+		pmc@d8130000 {
++		pmc at d8130000 {
 +			compatible = "via,vt8500-pmc";
 +			reg = <0xd8130000 0x1000>;
 +
@@ -110,65 +110,65 @@ index 0000000..17a1d0d
 +			};
 +		};
 +
-+		timer@d8130100 {
++		timer at d8130100 {
 +			compatible = "via,vt8500-timer";
 +			reg = <0xd8130100 0x28>;
 +			interrupts = <36>;
 +		};
 +
-+		ehci@d8007900 {
++		ehci at d8007900 {
 +			compatible = "via,vt8500-ehci";
 +			reg = <0xd8007900 0x200>;
 +			interrupts = <43>;
 +		};
 +
-+		uhci@d8007b00 {
++		uhci at d8007b00 {
 +			compatible = "platform-uhci";
 +			reg = <0xd8007b00 0x200>;
 +			interrupts = <43>;
 +		};
 +
-+		fb@d800e400 {
++		fb at d800e400 {
 +			compatible = "via,vt8500-fb";
 +			reg = <0xd800e400 0x400>;
 +			interrupts = <12>;
 +			via,display = <&display>;
 +		};
 +
-+		ge_rops@d8050400 {
++		ge_rops at d8050400 {
 +			compatible = "wm,prizm-ge-rops";
 +			reg = <0xd8050400 0x100>;
 +		};
 +
-+		uart@d8200000 {
++		uart at d8200000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd8200000 0x1040>;
 +			interrupts = <32>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d82b0000 {
++		uart at d82b0000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd82b0000 0x1040>;
 +			interrupts = <33>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d8210000 {
++		uart at d8210000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd8210000 0x1040>;
 +			interrupts = <47>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d82c0000 {
++		uart at d82c0000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd82c0000 0x1040>;
 +			interrupts = <50>;
 +			clocks = <&ref24>;
 +		};
 +
-+		rtc@d8100000 {
++		rtc at d8100000 {
 +			compatible = "via,vt8500-rtc";
 +			reg = <0xd8100000 0x10000>;
 +			interrupts = <48>;
@@ -232,7 +232,7 @@ index 0000000..aa6d492
 +	compatible = "wm,wm8505";
 +
 +	cpus {
-+		cpu@0 {
++		cpu at 0 {
 +			compatible = "arm,arm926ejs";
 +		};
 +	};
@@ -244,7 +244,7 @@ index 0000000..aa6d492
 +		ranges;
 +		interrupt-parent = <&intc0>;
 +
-+		intc0: interrupt-controller@d8140000 {
++		intc0: interrupt-controller at d8140000 {
 +			compatible = "via,vt8500-intc";
 +			interrupt-controller;
 +			reg = <0xd8140000 0x10000>;
@@ -252,7 +252,7 @@ index 0000000..aa6d492
 +		};
 +
 +		/* Secondary IC cascaded to intc0 */
-+		intc1: interrupt-controller@d8150000 {
++		intc1: interrupt-controller at d8150000 {
 +			compatible = "via,vt8500-intc";
 +			interrupt-controller;
 +			#interrupt-cells = <1>;
@@ -260,14 +260,14 @@ index 0000000..aa6d492
 +			interrupts = <56 57 58 59 60 61 62 63>;
 +		};
 +
-+		gpio: gpio-controller@d8110000 {
++		gpio: gpio-controller at d8110000 {
 +			compatible = "wm,wm8505-gpio";
 +			gpio-controller;
 +			reg = <0xd8110000 0x10000>;
 +			#gpio-cells = <3>;
 +		};
 +
-+		pmc@d8130000 {
++		pmc at d8130000 {
 +			compatible = "via,vt8500-pmc";
 +			reg = <0xd8130000 0x1000>;
 +			clocks {
@@ -282,78 +282,78 @@ index 0000000..aa6d492
 +			};
 +		};
 +
-+		timer@d8130100 {
++		timer at d8130100 {
 +			compatible = "via,vt8500-timer";
 +			reg = <0xd8130100 0x28>;
 +			interrupts = <36>;
 +		};
 +
-+		ehci@d8007100 {
++		ehci at d8007100 {
 +			compatible = "via,vt8500-ehci";
 +			reg = <0xd8007100 0x200>;
 +			interrupts = <43>;
 +		};
 +
-+		uhci@d8007300 {
++		uhci at d8007300 {
 +			compatible = "platform-uhci";
 +			reg = <0xd8007300 0x200>;
 +			interrupts = <43>;
 +		};
 +
-+		fb@d8050800 {
++		fb at d8050800 {
 +			compatible = "wm,wm8505-fb";
 +			reg = <0xd8050800 0x200>;
 +			via,display = <&display>;
 +		};
 +
-+		ge_rops@d8050400 {
++		ge_rops at d8050400 {
 +			compatible = "wm,prizm-ge-rops";
 +			reg = <0xd8050400 0x100>;
 +		};
 +
-+		uart@d8200000 {
++		uart at d8200000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd8200000 0x1040>;
 +			interrupts = <32>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d82b0000 {
++		uart at d82b0000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd82b0000 0x1040>;
 +			interrupts = <33>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d8210000 {
++		uart at d8210000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd8210000 0x1040>;
 +			interrupts = <47>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d82c0000 {
++		uart at d82c0000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd82c0000 0x1040>;
 +			interrupts = <50>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d8370000 {
++		uart at d8370000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd8370000 0x1040>;
 +			interrupts = <31>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d8380000 {
++		uart at d8380000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd8380000 0x1040>;
 +			interrupts = <30>;
 +			clocks = <&ref24>;
 +		};
 +
-+		rtc@d8100000 {
++		rtc at d8100000 {
 +			compatible = "via,vt8500-rtc";
 +			reg = <0xd8100000 0x10000>;
 +			interrupts = <48>;
@@ -423,7 +423,7 @@ index 0000000..372a734
 +		ranges;
 +		interrupt-parent = <&intc0>;
 +
-+		intc0: interrupt-controller@d8140000 {
++		intc0: interrupt-controller at d8140000 {
 +			compatible = "via,vt8500-intc";
 +			interrupt-controller;
 +			reg = <0xd8140000 0x10000>;
@@ -431,7 +431,7 @@ index 0000000..372a734
 +		};
 +
 +		/* Secondary IC cascaded to intc0 */
-+		intc1: interrupt-controller@d8150000 {
++		intc1: interrupt-controller at d8150000 {
 +			compatible = "via,vt8500-intc";
 +			interrupt-controller;
 +			#interrupt-cells = <1>;
@@ -439,14 +439,14 @@ index 0000000..372a734
 +			interrupts = <56 57 58 59 60 61 62 63>;
 +		};
 +
-+		gpio: gpio-controller@d8110000 {
++		gpio: gpio-controller at d8110000 {
 +			compatible = "wm,wm8650-gpio";
 +			gpio-controller;
 +			reg = <0xd8110000 0x10000>;
 +			#gpio-cells = <3>;
 +		};
 +
-+		pmc@d8130000 {
++		pmc at d8130000 {
 +			compatible = "via,vt8500-pmc";
 +			reg = <0xd8130000 0x1000>;
 +
@@ -499,50 +499,50 @@ index 0000000..372a734
 +			};
 +		};
 +
-+		timer@d8130100 {
++		timer at d8130100 {
 +			compatible = "via,vt8500-timer";
 +			reg = <0xd8130100 0x28>;
 +			interrupts = <36>;
 +		};
 +
-+		ehci@d8007900 {
++		ehci at d8007900 {
 +			compatible = "via,vt8500-ehci";
 +			reg = <0xd8007900 0x200>;
 +			interrupts = <43>;
 +		};
 +
-+		uhci@d8007b00 {
++		uhci at d8007b00 {
 +			compatible = "platform-uhci";
 +			reg = <0xd8007b00 0x200>;
 +			interrupts = <43>;
 +		};
 +
-+		fb@d8050800 {
++		fb at d8050800 {
 +			compatible = "wm,wm8505-fb";
 +			reg = <0xd8050800 0x200>;
 +			via,display = <&display>;
 +		};
 +
-+		ge_rops@d8050400 {
++		ge_rops at d8050400 {
 +			compatible = "wm,prizm-ge-rops";
 +			reg = <0xd8050400 0x100>;
 +		};
 +
-+		uart@d8200000 {
++		uart at d8200000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd8200000 0x1040>;
 +			interrupts = <32>;
 +			clocks = <&ref24>;
 +		};
 +
-+		uart@d82b0000 {
++		uart at d82b0000 {
 +			compatible = "via,vt8500-uart";
 +			reg = <0xd82b0000 0x1040>;
 +			interrupts = <33>;
 +			clocks = <&ref24>;
 +		};
 +
-+		rtc@d8100000 {
++		rtc at d8100000 {
 +			compatible = "via,vt8500-rtc";
 +			reg = <0xd8100000 0x10000>;
 +			interrupts = <48>;
diff --git a/a/content_digest b/N2/content_digest
index 349a496..65f2517 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,7 +1,7 @@
  "ref\01345707346-9035-1-git-send-email-linux@prisktech.co.nz\0"
- "From\0Tony Prisk <linux@prisktech.co.nz>\0"
+ "From\0linux@prisktech.co.nz (Tony Prisk)\0"
  "Subject\0[PATCHv4 1/9] arm: vt8500: Add device tree files for VIA/Wondermedia SoC's\0"
- "Date\0Thu, 23 Aug 2012 07:35:37 +0000\0"
+ "Date\0Thu, 23 Aug 2012 19:35:37 +1200\0"
  "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
@@ -87,21 +87,21 @@
  "+\t\tranges;\n"
  "+\t\tinterrupt-parent = <&intc>;\n"
  "+\n"
- "+\t\tintc: interrupt-controller@d8140000 {\n"
+ "+\t\tintc: interrupt-controller at d8140000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-intc\";\n"
  "+\t\t\tinterrupt-controller;\n"
  "+\t\t\treg = <0xd8140000 0x10000>;\n"
  "+\t\t\t#interrupt-cells = <1>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio: gpio-controller@d8110000 {\n"
+ "+\t\tgpio: gpio-controller at d8110000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-gpio\";\n"
  "+\t\t\tgpio-controller;\n"
  "+\t\t\treg = <0xd8110000 0x10000>;\n"
  "+\t\t\t#gpio-cells = <3>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tpmc@d8130000 {\n"
+ "+\t\tpmc at d8130000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-pmc\";\n"
  "+\t\t\treg = <0xd8130000 0x1000>;\n"
  "+\n"
@@ -117,65 +117,65 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ttimer@d8130100 {\n"
+ "+\t\ttimer at d8130100 {\n"
  "+\t\t\tcompatible = \"via,vt8500-timer\";\n"
  "+\t\t\treg = <0xd8130100 0x28>;\n"
  "+\t\t\tinterrupts = <36>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tehci@d8007900 {\n"
+ "+\t\tehci at d8007900 {\n"
  "+\t\t\tcompatible = \"via,vt8500-ehci\";\n"
  "+\t\t\treg = <0xd8007900 0x200>;\n"
  "+\t\t\tinterrupts = <43>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuhci@d8007b00 {\n"
+ "+\t\tuhci at d8007b00 {\n"
  "+\t\t\tcompatible = \"platform-uhci\";\n"
  "+\t\t\treg = <0xd8007b00 0x200>;\n"
  "+\t\t\tinterrupts = <43>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tfb@d800e400 {\n"
+ "+\t\tfb at d800e400 {\n"
  "+\t\t\tcompatible = \"via,vt8500-fb\";\n"
  "+\t\t\treg = <0xd800e400 0x400>;\n"
  "+\t\t\tinterrupts = <12>;\n"
  "+\t\t\tvia,display = <&display>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tge_rops@d8050400 {\n"
+ "+\t\tge_rops at d8050400 {\n"
  "+\t\t\tcompatible = \"wm,prizm-ge-rops\";\n"
  "+\t\t\treg = <0xd8050400 0x100>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d8200000 {\n"
+ "+\t\tuart at d8200000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd8200000 0x1040>;\n"
  "+\t\t\tinterrupts = <32>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d82b0000 {\n"
+ "+\t\tuart at d82b0000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd82b0000 0x1040>;\n"
  "+\t\t\tinterrupts = <33>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d8210000 {\n"
+ "+\t\tuart at d8210000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd8210000 0x1040>;\n"
  "+\t\t\tinterrupts = <47>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d82c0000 {\n"
+ "+\t\tuart at d82c0000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd82c0000 0x1040>;\n"
  "+\t\t\tinterrupts = <50>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\trtc@d8100000 {\n"
+ "+\t\trtc at d8100000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-rtc\";\n"
  "+\t\t\treg = <0xd8100000 0x10000>;\n"
  "+\t\t\tinterrupts = <48>;\n"
@@ -239,7 +239,7 @@
  "+\tcompatible = \"wm,wm8505\";\n"
  "+\n"
  "+\tcpus {\n"
- "+\t\tcpu@0 {\n"
+ "+\t\tcpu at 0 {\n"
  "+\t\t\tcompatible = \"arm,arm926ejs\";\n"
  "+\t\t};\n"
  "+\t};\n"
@@ -251,7 +251,7 @@
  "+\t\tranges;\n"
  "+\t\tinterrupt-parent = <&intc0>;\n"
  "+\n"
- "+\t\tintc0: interrupt-controller@d8140000 {\n"
+ "+\t\tintc0: interrupt-controller at d8140000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-intc\";\n"
  "+\t\t\tinterrupt-controller;\n"
  "+\t\t\treg = <0xd8140000 0x10000>;\n"
@@ -259,7 +259,7 @@
  "+\t\t};\n"
  "+\n"
  "+\t\t/* Secondary IC cascaded to intc0 */\n"
- "+\t\tintc1: interrupt-controller@d8150000 {\n"
+ "+\t\tintc1: interrupt-controller at d8150000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-intc\";\n"
  "+\t\t\tinterrupt-controller;\n"
  "+\t\t\t#interrupt-cells = <1>;\n"
@@ -267,14 +267,14 @@
  "+\t\t\tinterrupts = <56 57 58 59 60 61 62 63>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio: gpio-controller@d8110000 {\n"
+ "+\t\tgpio: gpio-controller at d8110000 {\n"
  "+\t\t\tcompatible = \"wm,wm8505-gpio\";\n"
  "+\t\t\tgpio-controller;\n"
  "+\t\t\treg = <0xd8110000 0x10000>;\n"
  "+\t\t\t#gpio-cells = <3>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tpmc@d8130000 {\n"
+ "+\t\tpmc at d8130000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-pmc\";\n"
  "+\t\t\treg = <0xd8130000 0x1000>;\n"
  "+\t\t\tclocks {\n"
@@ -289,78 +289,78 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ttimer@d8130100 {\n"
+ "+\t\ttimer at d8130100 {\n"
  "+\t\t\tcompatible = \"via,vt8500-timer\";\n"
  "+\t\t\treg = <0xd8130100 0x28>;\n"
  "+\t\t\tinterrupts = <36>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tehci@d8007100 {\n"
+ "+\t\tehci at d8007100 {\n"
  "+\t\t\tcompatible = \"via,vt8500-ehci\";\n"
  "+\t\t\treg = <0xd8007100 0x200>;\n"
  "+\t\t\tinterrupts = <43>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuhci@d8007300 {\n"
+ "+\t\tuhci at d8007300 {\n"
  "+\t\t\tcompatible = \"platform-uhci\";\n"
  "+\t\t\treg = <0xd8007300 0x200>;\n"
  "+\t\t\tinterrupts = <43>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tfb@d8050800 {\n"
+ "+\t\tfb at d8050800 {\n"
  "+\t\t\tcompatible = \"wm,wm8505-fb\";\n"
  "+\t\t\treg = <0xd8050800 0x200>;\n"
  "+\t\t\tvia,display = <&display>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tge_rops@d8050400 {\n"
+ "+\t\tge_rops at d8050400 {\n"
  "+\t\t\tcompatible = \"wm,prizm-ge-rops\";\n"
  "+\t\t\treg = <0xd8050400 0x100>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d8200000 {\n"
+ "+\t\tuart at d8200000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd8200000 0x1040>;\n"
  "+\t\t\tinterrupts = <32>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d82b0000 {\n"
+ "+\t\tuart at d82b0000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd82b0000 0x1040>;\n"
  "+\t\t\tinterrupts = <33>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d8210000 {\n"
+ "+\t\tuart at d8210000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd8210000 0x1040>;\n"
  "+\t\t\tinterrupts = <47>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d82c0000 {\n"
+ "+\t\tuart at d82c0000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd82c0000 0x1040>;\n"
  "+\t\t\tinterrupts = <50>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d8370000 {\n"
+ "+\t\tuart at d8370000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd8370000 0x1040>;\n"
  "+\t\t\tinterrupts = <31>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d8380000 {\n"
+ "+\t\tuart at d8380000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd8380000 0x1040>;\n"
  "+\t\t\tinterrupts = <30>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\trtc@d8100000 {\n"
+ "+\t\trtc at d8100000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-rtc\";\n"
  "+\t\t\treg = <0xd8100000 0x10000>;\n"
  "+\t\t\tinterrupts = <48>;\n"
@@ -430,7 +430,7 @@
  "+\t\tranges;\n"
  "+\t\tinterrupt-parent = <&intc0>;\n"
  "+\n"
- "+\t\tintc0: interrupt-controller@d8140000 {\n"
+ "+\t\tintc0: interrupt-controller at d8140000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-intc\";\n"
  "+\t\t\tinterrupt-controller;\n"
  "+\t\t\treg = <0xd8140000 0x10000>;\n"
@@ -438,7 +438,7 @@
  "+\t\t};\n"
  "+\n"
  "+\t\t/* Secondary IC cascaded to intc0 */\n"
- "+\t\tintc1: interrupt-controller@d8150000 {\n"
+ "+\t\tintc1: interrupt-controller at d8150000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-intc\";\n"
  "+\t\t\tinterrupt-controller;\n"
  "+\t\t\t#interrupt-cells = <1>;\n"
@@ -446,14 +446,14 @@
  "+\t\t\tinterrupts = <56 57 58 59 60 61 62 63>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio: gpio-controller@d8110000 {\n"
+ "+\t\tgpio: gpio-controller at d8110000 {\n"
  "+\t\t\tcompatible = \"wm,wm8650-gpio\";\n"
  "+\t\t\tgpio-controller;\n"
  "+\t\t\treg = <0xd8110000 0x10000>;\n"
  "+\t\t\t#gpio-cells = <3>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tpmc@d8130000 {\n"
+ "+\t\tpmc at d8130000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-pmc\";\n"
  "+\t\t\treg = <0xd8130000 0x1000>;\n"
  "+\n"
@@ -506,50 +506,50 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ttimer@d8130100 {\n"
+ "+\t\ttimer at d8130100 {\n"
  "+\t\t\tcompatible = \"via,vt8500-timer\";\n"
  "+\t\t\treg = <0xd8130100 0x28>;\n"
  "+\t\t\tinterrupts = <36>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tehci@d8007900 {\n"
+ "+\t\tehci at d8007900 {\n"
  "+\t\t\tcompatible = \"via,vt8500-ehci\";\n"
  "+\t\t\treg = <0xd8007900 0x200>;\n"
  "+\t\t\tinterrupts = <43>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuhci@d8007b00 {\n"
+ "+\t\tuhci at d8007b00 {\n"
  "+\t\t\tcompatible = \"platform-uhci\";\n"
  "+\t\t\treg = <0xd8007b00 0x200>;\n"
  "+\t\t\tinterrupts = <43>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tfb@d8050800 {\n"
+ "+\t\tfb at d8050800 {\n"
  "+\t\t\tcompatible = \"wm,wm8505-fb\";\n"
  "+\t\t\treg = <0xd8050800 0x200>;\n"
  "+\t\t\tvia,display = <&display>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tge_rops@d8050400 {\n"
+ "+\t\tge_rops at d8050400 {\n"
  "+\t\t\tcompatible = \"wm,prizm-ge-rops\";\n"
  "+\t\t\treg = <0xd8050400 0x100>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d8200000 {\n"
+ "+\t\tuart at d8200000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd8200000 0x1040>;\n"
  "+\t\t\tinterrupts = <32>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tuart@d82b0000 {\n"
+ "+\t\tuart at d82b0000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-uart\";\n"
  "+\t\t\treg = <0xd82b0000 0x1040>;\n"
  "+\t\t\tinterrupts = <33>;\n"
  "+\t\t\tclocks = <&ref24>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\trtc@d8100000 {\n"
+ "+\t\trtc at d8100000 {\n"
  "+\t\t\tcompatible = \"via,vt8500-rtc\";\n"
  "+\t\t\treg = <0xd8100000 0x10000>;\n"
  "+\t\t\tinterrupts = <48>;\n"
@@ -559,4 +559,4 @@
  "-- \n"
  1.7.9.5
 
-6393c733136e29817a4cccaae3d260b00590fc56a4d1ebc1b50bdfe828ba01f6
+0f8f338c3e3ca948fdf8bd2d361cb18bfd5259dc5ea8694659ce6a3e23c9286b

diff --git a/a/content_digest b/N3/content_digest
index 349a496..4b849cd 100644
--- a/a/content_digest
+++ b/N3/content_digest
@@ -1,8 +1,28 @@
  "ref\01345707346-9035-1-git-send-email-linux@prisktech.co.nz\0"
  "From\0Tony Prisk <linux@prisktech.co.nz>\0"
  "Subject\0[PATCHv4 1/9] arm: vt8500: Add device tree files for VIA/Wondermedia SoC's\0"
- "Date\0Thu, 23 Aug 2012 07:35:37 +0000\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "Date\0Thu, 23 Aug 2012 19:35:37 +1200\0"
+ "To\0vt8500-wm8505-linux-kernel@googlegroups.com\0"
+ "Cc\0Tony Prisk <linux@prisktech.co.nz>"
+  Russell King <linux@arm.linux.org.uk>
+  Alessandro Zummo <a.zummo@towertech.it>
+  Alan Cox <alan@linux.intel.com>
+  Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+  Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
+  Arnd Bergmann <arnd@arndb.de>
+  Grant Likely <grant.likely@secretlab.ca>
+  Rob Herring <rob.herring@calxeda.com>
+  Rob Landley <rob@landley.net>
+  Linus Walleij <linus.walleij@stericsson.com>
+  Mike Turquette <mturquette@ti.com>
+  Stephen Warren <swarren@nvidia.com>
+  linux-arm-kernel@lists.infradead.org
+  linux-kernel@vger.kernel.org
+  linux-fbdev@vger.kernel.org
+  linux-usb@vger.kernel.org
+  linux-serial@vger.kernel.org
+  rtc-linux@googlegroups.com
+ " devicetree-discuss@lists.ozlabs.org\0"
  "\00:1\0"
  "b\0"
  "Add device tree files for VT8500, WM8505 and WM8650 SoC's and\n"
@@ -559,4 +579,4 @@
  "-- \n"
  1.7.9.5
 
-6393c733136e29817a4cccaae3d260b00590fc56a4d1ebc1b50bdfe828ba01f6
+c9dd8b1395fd566dd6321685dad0fe8a1ad5c3e00f43b7a3f503e7184eaeffee

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