From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Stephane Eranian <eranian@google.com>
Cc: Andi Kleen <andi@firstfloor.org>,
LKML <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 01/31] perf, x86: Add PEBSv2 record support
Date: Fri, 28 Sep 2012 11:28:20 +0200 [thread overview]
Message-ID: <1348824500.3292.66.camel@twins> (raw)
In-Reply-To: <CABPqkBS1Crg7yHbzrvF7S2YUjrPZNSYRpE7tuax+OcEu4xrHMA@mail.gmail.com>
On Fri, 2012-09-28 at 10:54 +0200, Stephane Eranian wrote:
> On Fri, Sep 28, 2012 at 10:43 AM, Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> > On Thu, 2012-09-27 at 21:31 -0700, Andi Kleen wrote:
> >> + if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format < 2) {
> >
> > Shouldn't that be: && x86_pmu.intel_cap.pebs_trap, like most other sites
> > instead? Or didn't they flip the trap capability on Haswell?
>
> On Haswell, you get the event_ip which points to the sampled
> instruction, i.e., the off-by-one
> error can be avoided by using that value instead of pebs.rip. The nice
> side effect is that you
> free the LBR and minimize the overhead (no fixups). Therfore the LBR
> filter can have any
> setting when combined with PEBS, thus we do not need to check for
> compatibility nor force
> any setting for the LBR filter.
Yes I got that, but what good is that trap capability flag if they don't
use it? Them adding a second u64 to the format to report it seems to
suggest their trap capability is pointless, but nowhere has this been
explained.
next prev parent reply other threads:[~2012-09-28 9:28 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-28 4:31 perf PMU support for Haswell Andi Kleen
2012-09-28 4:31 ` [PATCH 01/31] perf, x86: Add PEBSv2 record support Andi Kleen
2012-09-28 8:43 ` Peter Zijlstra
2012-09-28 8:54 ` Stephane Eranian
2012-09-28 9:28 ` Peter Zijlstra [this message]
2012-09-28 11:33 ` Stephane Eranian
2012-09-28 14:42 ` Andi Kleen
2012-09-28 4:31 ` [PATCH 02/31] perf, x86: Basic Haswell PMU support Andi Kleen
2012-09-28 9:05 ` Peter Zijlstra
2012-09-28 14:58 ` Andi Kleen
[not found] ` <CABPqkBQ90Crh+EpRQq0Y+xUvrj5vzrX_=SpJQyR4p8uFR_Hr=Q@mail.gmail.com>
2012-09-28 15:21 ` Peter Zijlstra
2012-09-28 15:23 ` Andi Kleen
2012-09-28 4:31 ` [PATCH 03/31] perf, x86: Basic Haswell PEBS support Andi Kleen
2012-09-28 8:50 ` Peter Zijlstra
2012-09-28 4:31 ` [PATCH 04/31] perf, core: Add generic intx/intx_checkpointed counter modifiers Andi Kleen
2012-09-28 9:02 ` Peter Zijlstra
2012-09-28 11:35 ` Stephane Eranian
2012-09-28 14:53 ` Andi Kleen
2012-09-28 15:19 ` Peter Zijlstra
2012-09-28 15:29 ` Andi Kleen
2012-09-28 15:36 ` Peter Zijlstra
2012-09-28 15:23 ` Peter Zijlstra
2012-09-28 15:37 ` Andi Kleen
2012-09-28 4:31 ` [PATCH 05/31] perf, tools: Add :c,:t event modifiers in perf tools Andi Kleen
2012-09-28 4:31 ` [PATCH 06/31] perf, tools: Add intx/intx_checkpoint to perf script and header printing Andi Kleen
2012-09-28 4:31 ` [PATCH 07/31] perf, x86: Implement the :t and :c qualifiers for Haswell Andi Kleen
2012-09-28 4:31 ` [PATCH 08/31] perf, x86: Report PEBS event in a raw format Andi Kleen
2012-09-28 8:54 ` Peter Zijlstra
2012-09-28 8:57 ` Stephane Eranian
2012-09-28 4:31 ` [PATCH 09/31] perf, kvm: Support :t and :c perf modifiers in KVM arch perfmon emulation Andi Kleen
2012-09-28 4:31 ` [PATCH 10/31] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Andi Kleen
2012-09-28 4:31 ` [PATCH 11/31] perf, x86: Support Haswell v4 LBR format Andi Kleen
2012-09-28 4:31 ` [PATCH 12/31] perf, x86: Disable LBR recording for unknown LBR_FMT Andi Kleen
2012-09-28 4:31 ` [PATCH 13/31] perf, x86: Support LBR filtering by INTX/NOTX/ABORT Andi Kleen
2012-09-28 4:31 ` [PATCH 14/31] perf, tools: Add abort,notx,intx branch filter options to perf report -j Andi Kleen
2012-09-28 4:31 ` [PATCH 15/31] perf, tools: Support sorting by intx, abort branch flags Andi Kleen
2012-09-28 4:31 ` [PATCH 16/31] perf, x86: Support full width counting on Haswell Andi Kleen
2012-09-28 4:31 ` [PATCH 17/31] perf, x86: Avoid checkpointed counters causing excessive TSX aborts Andi Kleen
2012-09-28 4:31 ` [PATCH 18/31] perf, core: Add a concept of a weightened sample Andi Kleen
2012-09-28 9:06 ` Stephane Eranian
2012-09-28 14:57 ` Andi Kleen
2012-09-28 17:09 ` Stephane Eranian
2012-09-28 4:31 ` [PATCH 19/31] perf, x86: Support weight samples for PEBS Andi Kleen
2012-09-28 4:31 ` [PATCH 20/31] perf, tools: Add support for weight Andi Kleen
2012-09-28 4:31 ` [PATCH 21/31] perf, tools: Handle XBEGIN like a jump Andi Kleen
2012-09-28 4:31 ` [PATCH 22/31] perf, core: Define generic hardware transaction events Andi Kleen
2012-09-28 9:33 ` Peter Zijlstra
2012-09-28 4:31 ` [PATCH 23/31] perf, tools: Add support for generic transaction events to perf userspace Andi Kleen
2012-09-28 4:31 ` [PATCH 24/31] perf, x86: Add the Haswell implementation of the generic transaction events Andi Kleen
2012-09-28 4:31 ` [PATCH 25/31] perf, tools: Add perf stat --transaction Andi Kleen
2012-09-28 4:31 ` [PATCH 26/31] perf, x86: Support for printing PMU state on spurious PMIs Andi Kleen
2012-09-28 9:36 ` Peter Zijlstra
2012-09-28 11:39 ` Stephane Eranian
2012-09-28 4:31 ` [PATCH 27/31] perf, core: Add generic transaction flags Andi Kleen
2012-09-28 4:31 ` [PATCH 28/31] perf, x86: Add Haswell specific transaction flag reporting Andi Kleen
2012-09-28 4:31 ` [PATCH 29/31] perf, tools: Add support for record transaction flags Andi Kleen
2012-09-28 4:31 ` [PATCH 30/31] perf, tools: Point --sort documentation to --help Andi Kleen
2012-09-28 4:31 ` [PATCH 31/31] perf, tools: Add browser support for transaction flags Andi Kleen
-- strict thread matches above, loose matches on Subject: below --
2012-10-02 23:48 perf PMU support for Haswell v2 Andi Kleen
2012-10-02 23:48 ` [PATCH 01/31] perf, x86: Add PEBSv2 record support Andi Kleen
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