From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 04/18] drm/i915: don't call Haswell PCH code when we can't or don't need Date: Tue, 23 Oct 2012 18:29:54 -0200 Message-ID: <1351024208-3489-5-git-send-email-przanoni@gmail.com> References: <1351024208-3489-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-gh0-f177.google.com (mail-gh0-f177.google.com [209.85.160.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 49DC49EB1B for ; Tue, 23 Oct 2012 13:30:31 -0700 (PDT) Received: by mail-gh0-f177.google.com with SMTP id f20so824185ghb.36 for ; Tue, 23 Oct 2012 13:30:31 -0700 (PDT) In-Reply-To: <1351024208-3489-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni On Ironlake we have one PCH transcoder and FDI per pipe, so we know that if ironlake_crtc_driving_pch returns false we can disable the PCH transcoder and we also know that when we disable the crtc we can also disable the PCH transcoder. On Haswell there is only 1 PCH transcoder and FDI and they can be used by any CRTC. So if for one specific crtc haswell_crtc_driving_pch returns false we can't assert anything about the state of the PCH transcoder or the FDI link without checking if any other CRTC is using the PCH. So on this commit remove the "assert_fdi_{t,r}x_disabled" form haswell_crtc_enable and also only disable FDI and the PCH transcoder if the port being disabled was actually a PCH port (we only have one port using PCH: the VGA port). Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0c4e9c5..67c9472 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3286,12 +3286,8 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) is_pch_port = haswell_crtc_driving_pch(crtc); - if (is_pch_port) { + if (is_pch_port) ironlake_fdi_pll_enable(intel_crtc); - } else { - assert_fdi_tx_disabled(dev_priv, pipe); - assert_fdi_rx_disabled(dev_priv, pipe); - } for_each_encoder_on_crtc(dev, crtc, encoder) if (encoder->pre_enable) @@ -3433,10 +3429,13 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) struct intel_encoder *encoder; int pipe = intel_crtc->pipe; int plane = intel_crtc->plane; + bool is_pch_port; if (!intel_crtc->active) return; + is_pch_port = haswell_crtc_driving_pch(crtc); + for_each_encoder_on_crtc(dev, crtc, encoder) encoder->disable(encoder); @@ -3463,14 +3462,12 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) if (encoder->post_disable) encoder->post_disable(encoder); - ironlake_fdi_disable(crtc); - - intel_disable_transcoder(dev_priv, pipe); - - /* disable PCH DPLL */ - intel_disable_pch_pll(intel_crtc); - - ironlake_fdi_pll_disable(intel_crtc); + if (is_pch_port) { + ironlake_fdi_disable(crtc); + intel_disable_transcoder(dev_priv, pipe); + intel_disable_pch_pll(intel_crtc); + ironlake_fdi_pll_disable(intel_crtc); + } intel_crtc->active = false; intel_update_watermarks(dev); -- 1.7.11.4