diff for duplicates of <1366843096.17465.17@snotra> diff --git a/a/1.txt b/N1/1.txt index 3349975..c4da922 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -40,58 +40,58 @@ On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote: > > > u32 mask; > > > int cpu; > > > -> > >- mask =3D 1 << cur_booting_core; +> > >- mask = 1 << cur_booting_core; > > >- for_each_online_cpu(cpu) -> > >- mask |=3D 1 << get_hard_smp_processor_id(cpu); +> > >- mask |= 1 << get_hard_smp_processor_id(cpu); > > >+ if (smt_capable()) { > > >+ /* two threads in one core share one time base */ -> > >+ mask =3D 1 << cpu_core_index_of_thread(cur_booting_core); +> > >+ mask = 1 << cpu_core_index_of_thread(cur_booting_core); > > >+ for_each_online_cpu(cpu) -> > >+ mask |=3D 1 << cpu_core_index_of_thread( +> > >+ mask |= 1 << cpu_core_index_of_thread( > > >+ get_hard_smp_processor_id(cpu)); > > >+ } else { -> > >+ mask =3D 1 << cur_booting_core; +> > >+ mask = 1 << cur_booting_core; > > >+ for_each_online_cpu(cpu) -> > >+ mask |=3D 1 << get_hard_smp_processor_id(cpu); +> > >+ mask |= 1 << get_hard_smp_processor_id(cpu); > > >+ } > > > > Where is smt_capable defined()? I assume somewhere in the patchset > > but it's a pain to search 12 patches... > > ->=20 +> > It is defined in arch/powerpc/include/asm/topology.h. > #define smt_capable() (cpu_has_feature(CPU_FTR_SMT)) ->=20 +> > Thanks for your review again. -We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't claim =20 -that feature yet, except in our SDK kernel. That doesn't change the =20 +We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't claim +that feature yet, except in our SDK kernel. That doesn't change the topology of CPU numbering. > > Is this really about whether we're SMT-capable or whether we have > > rcpm v2? > > > > -Scott ->=20 -> I think this "if" statement can be removed. The =20 +> +> I think this "if" statement can be removed. The > cpu_core_index_of_thread() > can return the correct cpu number with thread or without thread. ->=20 +> > Like this: > static inline u32 get_phy_cpu_mask(void) > { > u32 mask; > int cpu; ->=20 -> mask =3D 1 << cpu_core_index_of_thread(cur_booting_core); +> +> mask = 1 << cpu_core_index_of_thread(cur_booting_core); > for_each_online_cpu(cpu) -> mask |=3D 1 << cpu_core_index_of_thread( +> mask |= 1 << cpu_core_index_of_thread( > get_hard_smp_processor_id(cpu)); ->=20 +> > return mask; > } -Likewise, this will get it wrong if SMT is disabled or not yet =20 +Likewise, this will get it wrong if SMT is disabled or not yet implemented on a core. --Scott= +-Scott diff --git a/a/content_digest b/N1/content_digest index 9cd6f88..4d0f4db 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,9 +3,9 @@ "Subject\0Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500\0" "Date\0Wed, 24 Apr 2013 17:38:16 -0500\0" "To\0Zhao Chenhui <chenhui.zhao@freescale.com>\0" - "Cc\0linuxppc-dev@lists.ozlabs.org" - linux-kernel@vger.kernel.org - " r58472@freescale.com\0" + "Cc\0<linuxppc-dev@lists.ozlabs.org>" + <linux-kernel@vger.kernel.org> + " <r58472@freescale.com>\0" "\00:1\0" "b\0" "On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:\n" @@ -50,60 +50,60 @@ "> > > \tu32 mask;\n" "> > > \tint cpu;\n" "> > >\n" - "> > >-\tmask =3D 1 << cur_booting_core;\n" + "> > >-\tmask = 1 << cur_booting_core;\n" "> > >-\tfor_each_online_cpu(cpu)\n" - "> > >-\t\tmask |=3D 1 << get_hard_smp_processor_id(cpu);\n" + "> > >-\t\tmask |= 1 << get_hard_smp_processor_id(cpu);\n" "> > >+\tif (smt_capable()) {\n" "> > >+\t\t/* two threads in one core share one time base */\n" - "> > >+\t\tmask =3D 1 << cpu_core_index_of_thread(cur_booting_core);\n" + "> > >+\t\tmask = 1 << cpu_core_index_of_thread(cur_booting_core);\n" "> > >+\t\tfor_each_online_cpu(cpu)\n" - "> > >+\t\t\tmask |=3D 1 << cpu_core_index_of_thread(\n" + "> > >+\t\t\tmask |= 1 << cpu_core_index_of_thread(\n" "> > >+\t\t\t\t\tget_hard_smp_processor_id(cpu));\n" "> > >+\t} else {\n" - "> > >+\t\tmask =3D 1 << cur_booting_core;\n" + "> > >+\t\tmask = 1 << cur_booting_core;\n" "> > >+\t\tfor_each_online_cpu(cpu)\n" - "> > >+\t\t\tmask |=3D 1 << get_hard_smp_processor_id(cpu);\n" + "> > >+\t\t\tmask |= 1 << get_hard_smp_processor_id(cpu);\n" "> > >+\t}\n" "> >\n" "> > Where is smt_capable defined()? I assume somewhere in the patchset\n" "> > but it's a pain to search 12 patches...\n" "> >\n" - ">=20\n" + "> \n" "> It is defined in arch/powerpc/include/asm/topology.h.\n" "> \t#define smt_capable() (cpu_has_feature(CPU_FTR_SMT))\n" - ">=20\n" + "> \n" "> Thanks for your review again.\n" "\n" - "We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't claim =20\n" - "that feature yet, except in our SDK kernel. That doesn't change the =20\n" + "We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't claim \n" + "that feature yet, except in our SDK kernel. That doesn't change the \n" "topology of CPU numbering.\n" "\n" "> > Is this really about whether we're SMT-capable or whether we have\n" "> > rcpm v2?\n" "> >\n" "> > -Scott\n" - ">=20\n" - "> I think this \"if\" statement can be removed. The =20\n" + "> \n" + "> I think this \"if\" statement can be removed. The \n" "> cpu_core_index_of_thread()\n" "> can return the correct cpu number with thread or without thread.\n" - ">=20\n" + "> \n" "> Like this:\n" "> static inline u32 get_phy_cpu_mask(void)\n" "> {\n" "> \tu32 mask;\n" "> \tint cpu;\n" - ">=20\n" - "> \tmask =3D 1 << cpu_core_index_of_thread(cur_booting_core);\n" + "> \n" + "> \tmask = 1 << cpu_core_index_of_thread(cur_booting_core);\n" "> \tfor_each_online_cpu(cpu)\n" - "> \t\tmask |=3D 1 << cpu_core_index_of_thread(\n" + "> \t\tmask |= 1 << cpu_core_index_of_thread(\n" "> \t\t\t\tget_hard_smp_processor_id(cpu));\n" - ">=20\n" + "> \n" "> \treturn mask;\n" "> }\n" "\n" - "Likewise, this will get it wrong if SMT is disabled or not yet =20\n" + "Likewise, this will get it wrong if SMT is disabled or not yet \n" "implemented on a core.\n" "\n" - -Scott= + -Scott -0e8168ba95e4dd2a0a0a06384efcc81fd26b933fcf7f9738f284b19106f39d58 +b505f845ff26015fbeea412703e51fd9da98603d146fa6f80d49b94d4e3eaeab
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