From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 12/15] drm/i915: Split up ironlake_check_fdi_lanes Date: Mon, 29 Apr 2013 15:19:47 +0300 Message-ID: <1367237987.6390.50.camel@intelbox> References: <1366363487-15926-1-git-send-email-daniel.vetter@ffwll.ch> <1366363487-15926-13-git-send-email-daniel.vetter@ffwll.ch> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 5008EE5C6B for ; Mon, 29 Apr 2013 05:19:51 -0700 (PDT) In-Reply-To: <1366363487-15926-13-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Fri, 2013-04-19 at 11:24 +0200, Daniel Vetter wrote: > Again in preparation to move the configuration checks into the > pipe_config computation stage of the modeset sequence. > > Signed-off-by: Daniel Vetter Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_display.c | 31 +++++++++++++++++++++++++------ > 1 file changed, 25 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 8e10e1b..c9a2f0b 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5440,11 +5440,6 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc) > return false; > } > > - if (intel_crtc->config.fdi_lanes > 2) > - WARN_ON(I915_READ(SOUTH_CHICKEN1) & FDI_BC_BIFURCATION_SELECT); > - else > - cpt_enable_fdi_bc_bifurcation(dev); > - > return true; > case PIPE_C: > if (!pipe_B_crtc->base.enabled || pipe_B_crtc->config.fdi_lanes <= 2) { > @@ -5461,9 +5456,31 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc) > return false; > } > > + return true; > + default: > + BUG(); > + } > +} > + > +static void ivybridge_update_fdi_bc_bifurcation(struct intel_crtc *intel_crtc) > +{ > + struct drm_device *dev = intel_crtc->base.dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > + > + switch (intel_crtc->pipe) { > + case PIPE_A: > + break; > + case PIPE_B: > + if (intel_crtc->config.fdi_lanes > 2) > + WARN_ON(I915_READ(SOUTH_CHICKEN1) & FDI_BC_BIFURCATION_SELECT); > + else > + cpt_enable_fdi_bc_bifurcation(dev); > + > + break; > + case PIPE_C: > cpt_enable_fdi_bc_bifurcation(dev); > > - return true; > + break; > default: > BUG(); > } > @@ -5738,6 +5755,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, > } > > fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc); > + if (IS_IVYBRIDGE(dev)) > + ivybridge_update_fdi_bc_bifurcation(intel_crtc); > > ironlake_set_pipeconf(crtc); >