All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <1367266736.32182.11@snotra>

diff --git a/a/1.txt b/N1/1.txt
index 3717daa..fe2b0ac 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -18,16 +18,16 @@ On 04/28/2013 04:56:34 AM, Zhao Chenhui wrote:
 > > we do ever have such a chip, there are probably other things that
 > > will need updating.
 > >
->=20
+> 
 > But how to know that there are TMRs on a chip except by CPU_FTR_SMT.
 
 I don't know.  I said I wouldn't bother. :-)
 
-Just assume there are 2 threads per core on e6500.  Then you won't have =20
-a dependency on the threading patches, and you won't break if =20
-CPU_FTR_SMT gets disabled for some other reason, or if the threads are =20
-missing from the device tree for some reason (I've seen some people =20
-remove them manually in an attempt to disable threading -- I tell them =20
+Just assume there are 2 threads per core on e6500.  Then you won't have  
+a dependency on the threading patches, and you won't break if  
+CPU_FTR_SMT gets disabled for some other reason, or if the threads are  
+missing from the device tree for some reason (I've seen some people  
+remove them manually in an attempt to disable threading -- I tell them  
 not to when I see it, but eventually others will do it again).
 
--Scott=
+-Scott
diff --git a/a/content_digest b/N1/content_digest
index 68ef9d7..b75c0f3 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -3,9 +3,9 @@
  "Subject\0Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500\0"
  "Date\0Mon, 29 Apr 2013 15:18:56 -0500\0"
  "To\0Zhao Chenhui <chenhui.zhao@freescale.com>\0"
- "Cc\0linuxppc-dev@lists.ozlabs.org"
-  linux-kernel@vger.kernel.org
- " r58472@freescale.com\0"
+ "Cc\0<linuxppc-dev@lists.ozlabs.org>"
+  <linux-kernel@vger.kernel.org>
+ " <r58472@freescale.com>\0"
  "\00:1\0"
  "b\0"
  "On 04/28/2013 04:56:34 AM, Zhao Chenhui wrote:\n"
@@ -28,18 +28,18 @@
  "> > we do ever have such a chip, there are probably other things that\n"
  "> > will need updating.\n"
  "> >\n"
- ">=20\n"
+ "> \n"
  "> But how to know that there are TMRs on a chip except by CPU_FTR_SMT.\n"
  "\n"
  "I don't know.  I said I wouldn't bother. :-)\n"
  "\n"
- "Just assume there are 2 threads per core on e6500.  Then you won't have =20\n"
- "a dependency on the threading patches, and you won't break if =20\n"
- "CPU_FTR_SMT gets disabled for some other reason, or if the threads are =20\n"
- "missing from the device tree for some reason (I've seen some people =20\n"
- "remove them manually in an attempt to disable threading -- I tell them =20\n"
+ "Just assume there are 2 threads per core on e6500.  Then you won't have  \n"
+ "a dependency on the threading patches, and you won't break if  \n"
+ "CPU_FTR_SMT gets disabled for some other reason, or if the threads are  \n"
+ "missing from the device tree for some reason (I've seen some people  \n"
+ "remove them manually in an attempt to disable threading -- I tell them  \n"
  "not to when I see it, but eventually others will do it again).\n"
  "\n"
- -Scott=
+ -Scott
 
-2c8694af71540600f600e689c1b22c0c55861fa79108a2cc3ff7d019c2e9b976
+4c1c21d85d1b4dda45d40538e357e02f471dc1e425a0d06ca974aabf093c3bc0

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.