diff for duplicates of <1368134856.654.11@snotra> diff --git a/a/1.txt b/N1/1.txt index 679c7d5..d8f0fb4 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,32 +1,32 @@ On 05/09/2013 07:37:42 AM, Benjamin Herrenschmidt wrote: > On Thu, 2013-05-09 at 17:44 +0800, tiejun.chen wrote: > > -> > Actually in the case GS=3D1 even if EE=3D0, EXT/DEC/DBELL still occur =20 +> > Actually in the case GS=1 even if EE=0, EXT/DEC/DBELL still occur > as I > > recall. ->=20 +> > Only if directed to the hypervisor. This is always the case with KVM, right? At least on booke... > > > Case 1) -> > > -> Local_irq_disable() will set soft_enabled =3D 0 +> > > -> Local_irq_disable() will set soft_enabled = 0 > > > -> Now Externel interrupt happens, there we set PACA_IRQ_EE in > > irq_happened, Also clears EE in SRR1 and rfi. So interrupts are hard > > disabled. No more other interrupt gated by MSR.EE can happen. Looks -> > like the idea here is to not let a device keep on inserting =20 +> > like the idea here is to not let a device keep on inserting > interrupt > > till the interrupt condition on device is cleared, right? ->=20 +> > The external interrupt line is level sensitive normally, so we have to -> mask MSR:EE in that case or the interrupt would keep re-occurring =20 +> mask MSR:EE in that case or the interrupt would keep re-occurring > (note > that FSL has this concept of auto-acked interrupts via the on die MPIC > for which you can potentially use PACA_IRQ_EE_EDGE instead and avoid > having to mask MSR:EE). -Note that if we do this, we can no longer leave the interrupt vector in =20 -EPR, and would have to track (potentially multiple different) pending =20 +Note that if we do this, we can no longer leave the interrupt vector in +EPR, and would have to track (potentially multiple different) pending external interrupts in software. --Scott= +-Scott diff --git a/a/content_digest b/N1/content_digest index 10708a2..ed10d86 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -16,34 +16,34 @@ "On 05/09/2013 07:37:42 AM, Benjamin Herrenschmidt wrote:\n" "> On Thu, 2013-05-09 at 17:44 +0800, tiejun.chen wrote:\n" "> >\n" - "> > Actually in the case GS=3D1 even if EE=3D0, EXT/DEC/DBELL still occur =20\n" + "> > Actually in the case GS=1 even if EE=0, EXT/DEC/DBELL still occur \n" "> as I\n" "> > recall.\n" - ">=20\n" + "> \n" "> Only if directed to the hypervisor.\n" "\n" "This is always the case with KVM, right? At least on booke...\n" "\n" "> > > Case 1)\n" - "> > > -> Local_irq_disable() will set soft_enabled =3D 0\n" + "> > > -> Local_irq_disable() will set soft_enabled = 0\n" "> > > -> Now Externel interrupt happens, there we set PACA_IRQ_EE in\n" "> > irq_happened, Also clears EE in SRR1 and rfi. So interrupts are hard\n" "> > disabled. No more other interrupt gated by MSR.EE can happen. Looks\n" - "> > like the idea here is to not let a device keep on inserting =20\n" + "> > like the idea here is to not let a device keep on inserting \n" "> interrupt\n" "> > till the interrupt condition on device is cleared, right?\n" - ">=20\n" + "> \n" "> The external interrupt line is level sensitive normally, so we have to\n" - "> mask MSR:EE in that case or the interrupt would keep re-occurring =20\n" + "> mask MSR:EE in that case or the interrupt would keep re-occurring \n" "> (note\n" "> that FSL has this concept of auto-acked interrupts via the on die MPIC\n" "> for which you can potentially use PACA_IRQ_EE_EDGE instead and avoid\n" "> having to mask MSR:EE).\n" "\n" - "Note that if we do this, we can no longer leave the interrupt vector in =20\n" - "EPR, and would have to track (potentially multiple different) pending =20\n" + "Note that if we do this, we can no longer leave the interrupt vector in \n" + "EPR, and would have to track (potentially multiple different) pending \n" "external interrupts in software.\n" "\n" - -Scott= + -Scott -c7851f71bf43783dea77b8ae8ac019758549570d2a324f3a72474a0d2e49902c +efd6d148b7a23fdd00e343976049f129cbb300b2d866741eaaf0872fd735022b
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