From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:60627) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UdSZH-0007Dg-2l for qemu-devel@nongnu.org; Fri, 17 May 2013 17:52:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UdSZ8-00024G-D6 for qemu-devel@nongnu.org; Fri, 17 May 2013 17:52:03 -0400 Received: from relay1.mentorg.com ([192.94.38.131]:33447) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UdSZ8-00023z-6n for qemu-devel@nongnu.org; Fri, 17 May 2013 17:51:54 -0400 From: Kwok Cheung Yeung Date: Fri, 17 May 2013 14:51:20 -0700 Message-ID: <1368827481-20434-2-git-send-email-kcy@codesourcery.com> In-Reply-To: <1368827481-20434-1-git-send-email-kcy@codesourcery.com> References: <1368827481-20434-1-git-send-email-kcy@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH v2 1/2] linux-user: Fix MIPS ISA transitions during signal handling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Kwok Cheung Yeung , peter.maydell@linaro.org, riku.voipio@iki.fi, aurelien@aurel32.net Processors supporting the MIPS16 or microMIPS ISAs set bit 0 in target addresses to indicate that the target is written using a compressed ISA. During signal handling, when jumping to or returning from a signal handler, bit 0 of the destination PC is inspected and MIPS_HFLAG_M16 in hflags cleared or set accordingly. Bit 0 of the PC is then cleared. Signed-off-by: Kwok Cheung Yeung --- linux-user/signal.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/linux-user/signal.c b/linux-user/signal.c index 1055507..dc34ae7 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -2620,6 +2620,15 @@ get_sigframe(struct target_sigaction *ka, CPUMIPSState *regs, size_t frame_size) return (sp - frame_size) & ~7; } +static void mips_set_hflags_isa_mode_from_pc(CPUMIPSState *env) +{ + if (env->insn_flags & (ASE_MIPS16 | ASE_MICROMIPS)) { + env->hflags &= ~MIPS_HFLAG_M16; + env->hflags |= (env->active_tc.PC & 1) << MIPS_HFLAG_M16_SHIFT; + env->active_tc.PC &= ~(target_ulong) 1; + } +} + # if defined(TARGET_ABI_MIPSO32) /* compare linux/arch/mips/kernel/signal.c:setup_frame() */ static void setup_frame(int sig, struct target_sigaction * ka, @@ -2662,6 +2671,7 @@ static void setup_frame(int sig, struct target_sigaction * ka, * since it returns to userland using eret * we cannot do this here, and we must set PC directly */ regs->active_tc.PC = regs->active_tc.gpr[25] = ka->_sa_handler; + mips_set_hflags_isa_mode_from_pc(regs); unlock_user_struct(frame, frame_addr, 1); return; @@ -2709,6 +2719,7 @@ long do_sigreturn(CPUMIPSState *regs) #endif regs->active_tc.PC = regs->CP0_EPC; + mips_set_hflags_isa_mode_from_pc(regs); /* I am not sure this is right, but it seems to work * maybe a problem with nested signals ? */ regs->CP0_EPC = 0; @@ -2771,6 +2782,7 @@ static void setup_rt_frame(int sig, struct target_sigaction *ka, * since it returns to userland using eret * we cannot do this here, and we must set PC directly */ env->active_tc.PC = env->active_tc.gpr[25] = ka->_sa_handler; + mips_set_hflags_isa_mode_from_pc(env); unlock_user_struct(frame, frame_addr, 1); return; @@ -2804,6 +2816,7 @@ long do_rt_sigreturn(CPUMIPSState *env) goto badframe; env->active_tc.PC = env->CP0_EPC; + mips_set_hflags_isa_mode_from_pc(env); /* I am not sure this is right, but it seems to work * maybe a problem with nested signals ? */ env->CP0_EPC = 0; -- 1.8.1.2