diff for duplicates of <1368868514-18975-5-git-send-email-linux@prisktech.co.nz> diff --git a/a/1.txt b/N1/1.txt index 0062a39..49a759d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -59,7 +59,7 @@ index f8bffc2..d1f7f33 100644 * Bit 8+9 (0x300) are ignored on WM8505 as reserved */ - writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB); -+ if (fbi->interface = INTERFACE_VGA) ++ if (fbi->interface == INTERFACE_VGA) + writel(0x338, fbi->regbase + REG_GOVRH_YUVRGB); + else + writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB); @@ -73,7 +73,7 @@ index f8bffc2..d1f7f33 100644 writel(0xf, fbi->regbase + REG_GOVRH_FHI); - writel(4, fbi->regbase + REG_GOVRH_DVO_SET); + -+ if (fbi->interface = INTERFACE_VGA) ++ if (fbi->interface == INTERFACE_VGA) + writel(0xe, fbi->regbase + REG_GOVRH_DVO_SET); + else + writel(4, fbi->regbase + REG_GOVRH_DVO_SET); @@ -85,14 +85,14 @@ index f8bffc2..d1f7f33 100644 writel(h_end, fbi->regbase + REG_GOVRH_ACTPX_END); writel(h_all, fbi->regbase + REG_GOVRH_H_ALLPXL); writel(h_sync, fbi->regbase + REG_GOVRH_HDMI_HSYNW); -+ if (fbi->interface = INTERFACE_VGA) ++ if (fbi->interface == INTERFACE_VGA) + writel(h_sync, fbi->regbase + REG_GOVRH_VGA_HSYNW); writel(v_start, fbi->regbase + REG_GOVRH_ACTLN_BG); writel(v_end, fbi->regbase + REG_GOVRH_ACTLN_END); writel(v_all, fbi->regbase + REG_GOVRH_V_ALLLN); writel(v_sync, fbi->regbase + REG_GOVRH_HDMI_VBISW); -+ if (fbi->interface = INTERFACE_VGA) ++ if (fbi->interface == INTERFACE_VGA) + writel(info->var.pixclock, fbi->regbase + REG_GOVRH_VGA_VSYNW); writel(1, fbi->regbase + REG_GOVRH_TG_ENABLE); diff --git a/a/content_digest b/N1/content_digest index 55174ef..53bd833 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,7 +1,7 @@ "ref\01368868514-18975-1-git-send-email-linux@prisktech.co.nz\0" - "From\0Tony Prisk <linux@prisktech.co.nz>\0" + "From\0linux@prisktech.co.nz (Tony Prisk)\0" "Subject\0[PATCH 4/4] fb: vt8500: Add VGA output support to wm8505fb driver.\0" - "Date\0Sat, 18 May 2013 09:15:14 +0000\0" + "Date\0Sat, 18 May 2013 21:15:14 +1200\0" "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" @@ -66,7 +66,7 @@ " \t * Bit 8+9 (0x300) are ignored on WM8505 as reserved\n" " \t */\n" "-\twritel(0x31c,\t\t fbi->regbase + REG_GOVRH_YUVRGB);\n" - "+\tif (fbi->interface = INTERFACE_VGA)\n" + "+\tif (fbi->interface == INTERFACE_VGA)\n" "+\t\twritel(0x338, fbi->regbase + REG_GOVRH_YUVRGB);\n" "+\telse\n" "+\t\twritel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB);\n" @@ -80,7 +80,7 @@ " \twritel(0xf,\t\t fbi->regbase + REG_GOVRH_FHI);\n" "-\twritel(4,\t\t fbi->regbase + REG_GOVRH_DVO_SET);\n" "+\n" - "+\tif (fbi->interface = INTERFACE_VGA)\n" + "+\tif (fbi->interface == INTERFACE_VGA)\n" "+\t\twritel(0xe, fbi->regbase + REG_GOVRH_DVO_SET);\n" "+\telse\n" "+\t\twritel(4, fbi->regbase + REG_GOVRH_DVO_SET);\n" @@ -92,14 +92,14 @@ " \twritel(h_end, fbi->regbase + REG_GOVRH_ACTPX_END);\n" " \twritel(h_all, fbi->regbase + REG_GOVRH_H_ALLPXL);\n" " \twritel(h_sync, fbi->regbase + REG_GOVRH_HDMI_HSYNW);\n" - "+\tif (fbi->interface = INTERFACE_VGA)\n" + "+\tif (fbi->interface == INTERFACE_VGA)\n" "+\t\twritel(h_sync, fbi->regbase + REG_GOVRH_VGA_HSYNW);\n" " \n" " \twritel(v_start, fbi->regbase + REG_GOVRH_ACTLN_BG);\n" " \twritel(v_end, fbi->regbase + REG_GOVRH_ACTLN_END);\n" " \twritel(v_all, fbi->regbase + REG_GOVRH_V_ALLLN);\n" " \twritel(v_sync, fbi->regbase + REG_GOVRH_HDMI_VBISW);\n" - "+\tif (fbi->interface = INTERFACE_VGA)\n" + "+\tif (fbi->interface == INTERFACE_VGA)\n" "+\t\twritel(info->var.pixclock, fbi->regbase + REG_GOVRH_VGA_VSYNW);\n" " \n" " \twritel(1, fbi->regbase + REG_GOVRH_TG_ENABLE);\n" @@ -130,4 +130,4 @@ "-- \n" 1.7.9.5 -e6894cbca221a476e4a3f0fea6edd20a5dcf9fbd9ff8eb87882e10e6ec34b3e6 +4ba20ad0332441ab76f0751e2d912980ce206fd4553e6a2abc1f307f60b467aa
diff --git a/a/1.txt b/N2/1.txt index 0062a39..49a759d 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -59,7 +59,7 @@ index f8bffc2..d1f7f33 100644 * Bit 8+9 (0x300) are ignored on WM8505 as reserved */ - writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB); -+ if (fbi->interface = INTERFACE_VGA) ++ if (fbi->interface == INTERFACE_VGA) + writel(0x338, fbi->regbase + REG_GOVRH_YUVRGB); + else + writel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB); @@ -73,7 +73,7 @@ index f8bffc2..d1f7f33 100644 writel(0xf, fbi->regbase + REG_GOVRH_FHI); - writel(4, fbi->regbase + REG_GOVRH_DVO_SET); + -+ if (fbi->interface = INTERFACE_VGA) ++ if (fbi->interface == INTERFACE_VGA) + writel(0xe, fbi->regbase + REG_GOVRH_DVO_SET); + else + writel(4, fbi->regbase + REG_GOVRH_DVO_SET); @@ -85,14 +85,14 @@ index f8bffc2..d1f7f33 100644 writel(h_end, fbi->regbase + REG_GOVRH_ACTPX_END); writel(h_all, fbi->regbase + REG_GOVRH_H_ALLPXL); writel(h_sync, fbi->regbase + REG_GOVRH_HDMI_HSYNW); -+ if (fbi->interface = INTERFACE_VGA) ++ if (fbi->interface == INTERFACE_VGA) + writel(h_sync, fbi->regbase + REG_GOVRH_VGA_HSYNW); writel(v_start, fbi->regbase + REG_GOVRH_ACTLN_BG); writel(v_end, fbi->regbase + REG_GOVRH_ACTLN_END); writel(v_all, fbi->regbase + REG_GOVRH_V_ALLLN); writel(v_sync, fbi->regbase + REG_GOVRH_HDMI_VBISW); -+ if (fbi->interface = INTERFACE_VGA) ++ if (fbi->interface == INTERFACE_VGA) + writel(info->var.pixclock, fbi->regbase + REG_GOVRH_VGA_VSYNW); writel(1, fbi->regbase + REG_GOVRH_TG_ENABLE); diff --git a/a/content_digest b/N2/content_digest index 55174ef..4279b0e 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,8 +1,14 @@ "ref\01368868514-18975-1-git-send-email-linux@prisktech.co.nz\0" "From\0Tony Prisk <linux@prisktech.co.nz>\0" "Subject\0[PATCH 4/4] fb: vt8500: Add VGA output support to wm8505fb driver.\0" - "Date\0Sat, 18 May 2013 09:15:14 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "Date\0Sat, 18 May 2013 21:15:14 +1200\0" + "To\0Florian Tobias Schandinat <FlorianSchandinat@gmx.de>\0" + "Cc\0vt8500-wm8505-linux-kernel@googlegroups.com" + linux-arm-kernel@lists.infradead.org + linux-kernel@vger.kernel.org + tomi.valkeinen@ti.com + linux-fbdev@vger.kernel.org + " Tony Prisk <linux@prisktech.co.nz>\0" "\00:1\0" "b\0" "The APC8750 does not support an LCD panel, but provides a VGA connector.\n" @@ -66,7 +72,7 @@ " \t * Bit 8+9 (0x300) are ignored on WM8505 as reserved\n" " \t */\n" "-\twritel(0x31c,\t\t fbi->regbase + REG_GOVRH_YUVRGB);\n" - "+\tif (fbi->interface = INTERFACE_VGA)\n" + "+\tif (fbi->interface == INTERFACE_VGA)\n" "+\t\twritel(0x338, fbi->regbase + REG_GOVRH_YUVRGB);\n" "+\telse\n" "+\t\twritel(0x31c, fbi->regbase + REG_GOVRH_YUVRGB);\n" @@ -80,7 +86,7 @@ " \twritel(0xf,\t\t fbi->regbase + REG_GOVRH_FHI);\n" "-\twritel(4,\t\t fbi->regbase + REG_GOVRH_DVO_SET);\n" "+\n" - "+\tif (fbi->interface = INTERFACE_VGA)\n" + "+\tif (fbi->interface == INTERFACE_VGA)\n" "+\t\twritel(0xe, fbi->regbase + REG_GOVRH_DVO_SET);\n" "+\telse\n" "+\t\twritel(4, fbi->regbase + REG_GOVRH_DVO_SET);\n" @@ -92,14 +98,14 @@ " \twritel(h_end, fbi->regbase + REG_GOVRH_ACTPX_END);\n" " \twritel(h_all, fbi->regbase + REG_GOVRH_H_ALLPXL);\n" " \twritel(h_sync, fbi->regbase + REG_GOVRH_HDMI_HSYNW);\n" - "+\tif (fbi->interface = INTERFACE_VGA)\n" + "+\tif (fbi->interface == INTERFACE_VGA)\n" "+\t\twritel(h_sync, fbi->regbase + REG_GOVRH_VGA_HSYNW);\n" " \n" " \twritel(v_start, fbi->regbase + REG_GOVRH_ACTLN_BG);\n" " \twritel(v_end, fbi->regbase + REG_GOVRH_ACTLN_END);\n" " \twritel(v_all, fbi->regbase + REG_GOVRH_V_ALLLN);\n" " \twritel(v_sync, fbi->regbase + REG_GOVRH_HDMI_VBISW);\n" - "+\tif (fbi->interface = INTERFACE_VGA)\n" + "+\tif (fbi->interface == INTERFACE_VGA)\n" "+\t\twritel(info->var.pixclock, fbi->regbase + REG_GOVRH_VGA_VSYNW);\n" " \n" " \twritel(1, fbi->regbase + REG_GOVRH_TG_ENABLE);\n" @@ -130,4 +136,4 @@ "-- \n" 1.7.9.5 -e6894cbca221a476e4a3f0fea6edd20a5dcf9fbd9ff8eb87882e10e6ec34b3e6 +7962979d91486fe40c2b9682b7c26d6d5bc1edb2d531011d9f937b6aa461bea1
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