diff for duplicates of <1370299385.21388.10@snotra> diff --git a/a/1.txt b/N1/1.txt index f8e69a7..9b0cf5a 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,20 +1,20 @@ On 04/19/2013 05:47:38 AM, Zhao Chenhui wrote: > From: Li Yang <leoli@freescale.com> ->=20 +> > Signed-off-by: Li Yang <leoli@freescale.com> > Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> > --- -> .../devicetree/bindings/powerpc/fsl/pmc.txt | 59 =20 +> .../devicetree/bindings/powerpc/fsl/pmc.txt | 59 > +++++++++++-------- > 1 files changed, 34 insertions(+), 25 deletions(-) ->=20 -> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt =20 +> +> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt > b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt > index 07256b7..f1f749f 100644 > --- a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt > +++ b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt > @@ -9,15 +9,20 @@ Properties: ->=20 +> > "fsl,mpc8548-pmc" should be listed for any chip whose PMC is > compatible. "fsl,mpc8536-pmc" should also be listed for any chip > - whose PMC is compatible, and implies deep-sleep capability. @@ -23,20 +23,20 @@ On 04/19/2013 05:47:38 AM, Zhao Chenhui wrote: > + > + "fsl,p1022-pmc" should be listed for any chip whose PMC is > + compatible, and implies lossless Ethernet capability during sleep. ->=20 +> > "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is -> compatible; all statements below that apply to "fsl,mpc8548-pmc" =20 +> compatible; all statements below that apply to "fsl,mpc8548-pmc" > also > apply to "fsl,mpc8641d-pmc". ->=20 -> Compatibility does not include bit assignments in =20 +> +> Compatibility does not include bit assignments in > SCCR/PMCDR/DEVDISR; these -> - bit assignments are indicated via the sleep specifier in each =20 +> - bit assignments are indicated via the sleep specifier in each > device's > - sleep property. -> + bit assignments are indicated via the clock nodes. Device which =20 +> + bit assignments are indicated via the clock nodes. Device which > has a -> + controllable clock source should have a "fsl,pmc-handle" property =20 +> + controllable clock source should have a "fsl,pmc-handle" property > pointing > + to the clock node. @@ -45,4 +45,4 @@ http://patchwork.ozlabs.org/patch/147177/ Also indicate, below the ---, what has changed from previous versions. --Scott= +-Scott diff --git a/a/content_digest b/N1/content_digest index ff03339..41fabd5 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -4,27 +4,27 @@ "Subject\0Re: [PATCH v2 05/15] fsl_pmc: update device bindings\0" "Date\0Mon, 3 Jun 2013 17:43:05 -0500\0" "To\0Zhao Chenhui <chenhui.zhao@freescale.com>\0" - "Cc\0linuxppc-dev@lists.ozlabs.org" - " linux-kernel@vger.kernel.org\0" + "Cc\0<linuxppc-dev@lists.ozlabs.org>" + " <linux-kernel@vger.kernel.org>\0" "\00:1\0" "b\0" "On 04/19/2013 05:47:38 AM, Zhao Chenhui wrote:\n" "> From: Li Yang <leoli@freescale.com>\n" - ">=20\n" + "> \n" "> Signed-off-by: Li Yang <leoli@freescale.com>\n" "> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>\n" "> ---\n" - "> .../devicetree/bindings/powerpc/fsl/pmc.txt | 59 =20\n" + "> .../devicetree/bindings/powerpc/fsl/pmc.txt | 59 \n" "> +++++++++++--------\n" "> 1 files changed, 34 insertions(+), 25 deletions(-)\n" - ">=20\n" - "> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt =20\n" + "> \n" + "> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt \n" "> b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt\n" "> index 07256b7..f1f749f 100644\n" "> --- a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt\n" "> +++ b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt\n" "> @@ -9,15 +9,20 @@ Properties:\n" - ">=20\n" + "> \n" "> \"fsl,mpc8548-pmc\" should be listed for any chip whose PMC is\n" "> compatible. \"fsl,mpc8536-pmc\" should also be listed for any chip\n" "> - whose PMC is compatible, and implies deep-sleep capability.\n" @@ -33,20 +33,20 @@ "> +\n" "> + \"fsl,p1022-pmc\" should be listed for any chip whose PMC is\n" "> + compatible, and implies lossless Ethernet capability during sleep.\n" - ">=20\n" + "> \n" "> \"fsl,mpc8641d-pmc\" should be listed for any chip whose PMC is\n" - "> compatible; all statements below that apply to \"fsl,mpc8548-pmc\" =20\n" + "> compatible; all statements below that apply to \"fsl,mpc8548-pmc\" \n" "> also\n" "> apply to \"fsl,mpc8641d-pmc\".\n" - ">=20\n" - "> Compatibility does not include bit assignments in =20\n" + "> \n" + "> Compatibility does not include bit assignments in \n" "> SCCR/PMCDR/DEVDISR; these\n" - "> - bit assignments are indicated via the sleep specifier in each =20\n" + "> - bit assignments are indicated via the sleep specifier in each \n" "> device's\n" "> - sleep property.\n" - "> + bit assignments are indicated via the clock nodes. Device which =20\n" + "> + bit assignments are indicated via the clock nodes. Device which \n" "> has a\n" - "> + controllable clock source should have a \"fsl,pmc-handle\" property =20\n" + "> + controllable clock source should have a \"fsl,pmc-handle\" property \n" "> pointing\n" "> + to the clock node.\n" "\n" @@ -55,6 +55,6 @@ "\n" "Also indicate, below the ---, what has changed from previous versions.\n" "\n" - -Scott= + -Scott -cd26e62ed2d7dcf4e9bc3b3a91a1357806e460ba944b3985b02b174f7c6cae46 +ddae14ad8ab6169e125116aa7bcbb73541ab45b1a729fd52cd1788df6c1169b0
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