diff for duplicates of <1370971739.18413.27@snotra> diff --git a/a/1.txt b/N1/1.txt index cf98c8d..113f571 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ On 06/11/2013 12:09:42 PM, Michael Guntsche wrote: -> On Tue, Jun 11, 2013 at 7:00 PM, Scott Wood <scottwood@freescale.com> =20 +> On Tue, Jun 11, 2013 at 7:00 PM, Scott Wood <scottwood@freescale.com> > wrote: > > On 06/11/2013 02:24:28 AM, Rojhalat Ibrahim wrote: > >> @@ -7,9 +7,9 @@ On 06/11/2013 12:09:42 PM, Michael Guntsche wrote: > >> > On 06/10/2013 12:07:43 PM, Michael Guntsche wrote: > >> > > Good evening, > >> > > -> >> > > This patch does not fix the problem, during boot the kernel =20 +> >> > > This patch does not fix the problem, during boot the kernel > still -> >> > > panics. I had a closer look at the commit and the following =20 +> >> > > panics. I had a closer look at the commit and the following > patch > >> > > fixes it for me.... > >> > > @@ -18,7 +18,7 @@ On 06/11/2013 12:09:42 PM, Michael Guntsche wrote: > >> > > index 028ac1f..21b687f 100644 > >> > > --- a/arch/powerpc/sysdev/fsl_pci.c > >> > > +++ b/arch/powerpc/sysdev/fsl_pci.c -> >> > > @@ -814,7 +814,7 @@ int __init mpc83xx_add_bridge(struct =20 +> >> > > @@ -814,7 +814,7 @@ int __init mpc83xx_add_bridge(struct > device_node > >> > > *dev) > >> > > @@ -41,11 +41,11 @@ On 06/11/2013 12:09:42 PM, Michael Guntsche wrote: > >> > > >> > -Scott > >> -> >> The difference is only the read function in hose->ops, which is =20 +> >> The difference is only the read function in hose->ops, which is > set to > >> indirect_read_config instead of fsl_indirect_read_config. > >> -> >> fsl_indirect_read_config calls fsl_pcie_check_link, which is where =20 +> >> fsl_indirect_read_config calls fsl_pcie_check_link, which is where > the > >> Oops > >> occurs. @@ -54,7 +54,7 @@ On 06/11/2013 12:09:42 PM, Michael Guntsche wrote: > > Why is fsl_pcie_check_link being called for non-PCIe buses? > > > > -> >> Mike, can you find out where exactly in fsl_pcie_check_link the =20 +> >> Mike, can you find out where exactly in fsl_pcie_check_link the > bad access > >> happens? Enabling CONFIG_DEBUG_BUGVERBOSE might help. > > @@ -62,19 +62,19 @@ On 06/11/2013 12:09:42 PM, Michael Guntsche wrote: > > Why does it matter? You shouldn't be calling that function at all. > > > > -Scott ->=20 +> > For the record BUGVERBOSE is already set with this build so this is > the most detailed trace I get. And regarding Scott's remark, maybe I > was not clear enough in my first report. This is a PCI only board so I > also wondered about the call to fsl_pcie_check_link in the first > place. -Yes, I figured it was non-PCIe because the code change that you said =20 -helped was on the non-PCIe branch of the if/else. Generally it's good =20 +Yes, I figured it was non-PCIe because the code change that you said +helped was on the non-PCIe branch of the if/else. Generally it's good to explicitly mention the chip you're using, though. -fsl_setup_indirect_pci should be renamed to fsl_setup_indirect_pcie. =20 -Your patch above should be applied, and fsl_setup_indirect_pcie should =20 +fsl_setup_indirect_pci should be renamed to fsl_setup_indirect_pcie. +Your patch above should be applied, and fsl_setup_indirect_pcie should be moved into the booke/86xx ifdef to avoid an unused function warning. --Scott= +-Scott diff --git a/a/content_digest b/N1/content_digest index 3742d4f..db0d114 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,13 +3,13 @@ "Subject\0Re: [BUG] PCI related panic on powerpc based board with 3.10-rcX\0" "Date\0Tue, 11 Jun 2013 12:28:59 -0500\0" "To\0Michael Guntsche <michael.guntsche@it-loops.com>\0" - "Cc\0linuxppc-dev@lists.ozlabs.org" - Rojhalat Ibrahim <imr@rtschenk.de> - " linux-kernel@vger.kernel.org\0" + "Cc\0Rojhalat Ibrahim <imr@rtschenk.de>" + <linuxppc-dev@lists.ozlabs.org> + " <linux-kernel@vger.kernel.org>\0" "\00:1\0" "b\0" "On 06/11/2013 12:09:42 PM, Michael Guntsche wrote:\n" - "> On Tue, Jun 11, 2013 at 7:00 PM, Scott Wood <scottwood@freescale.com> =20\n" + "> On Tue, Jun 11, 2013 at 7:00 PM, Scott Wood <scottwood@freescale.com> \n" "> wrote:\n" "> > On 06/11/2013 02:24:28 AM, Rojhalat Ibrahim wrote:\n" "> >>\n" @@ -17,9 +17,9 @@ "> >> > On 06/10/2013 12:07:43 PM, Michael Guntsche wrote:\n" "> >> > > Good evening,\n" "> >> > >\n" - "> >> > > This patch does not fix the problem, during boot the kernel =20\n" + "> >> > > This patch does not fix the problem, during boot the kernel \n" "> still\n" - "> >> > > panics. I had a closer look at the commit and the following =20\n" + "> >> > > panics. I had a closer look at the commit and the following \n" "> patch\n" "> >> > > fixes it for me....\n" "> >> > >\n" @@ -28,7 +28,7 @@ "> >> > > index 028ac1f..21b687f 100644\n" "> >> > > --- a/arch/powerpc/sysdev/fsl_pci.c\n" "> >> > > +++ b/arch/powerpc/sysdev/fsl_pci.c\n" - "> >> > > @@ -814,7 +814,7 @@ int __init mpc83xx_add_bridge(struct =20\n" + "> >> > > @@ -814,7 +814,7 @@ int __init mpc83xx_add_bridge(struct \n" "> device_node\n" "> >> > > *dev)\n" "> >> > >\n" @@ -51,11 +51,11 @@ "> >> >\n" "> >> > -Scott\n" "> >>\n" - "> >> The difference is only the read function in hose->ops, which is =20\n" + "> >> The difference is only the read function in hose->ops, which is \n" "> set to\n" "> >> indirect_read_config instead of fsl_indirect_read_config.\n" "> >>\n" - "> >> fsl_indirect_read_config calls fsl_pcie_check_link, which is where =20\n" + "> >> fsl_indirect_read_config calls fsl_pcie_check_link, which is where \n" "> the\n" "> >> Oops\n" "> >> occurs.\n" @@ -64,7 +64,7 @@ "> > Why is fsl_pcie_check_link being called for non-PCIe buses?\n" "> >\n" "> >\n" - "> >> Mike, can you find out where exactly in fsl_pcie_check_link the =20\n" + "> >> Mike, can you find out where exactly in fsl_pcie_check_link the \n" "> bad access\n" "> >> happens? Enabling CONFIG_DEBUG_BUGVERBOSE might help.\n" "> >\n" @@ -72,21 +72,21 @@ "> > Why does it matter? You shouldn't be calling that function at all.\n" "> >\n" "> > -Scott\n" - ">=20\n" + "> \n" "> For the record BUGVERBOSE is already set with this build so this is\n" "> the most detailed trace I get. And regarding Scott's remark, maybe I\n" "> was not clear enough in my first report. This is a PCI only board so I\n" "> also wondered about the call to fsl_pcie_check_link in the first\n" "> place.\n" "\n" - "Yes, I figured it was non-PCIe because the code change that you said =20\n" - "helped was on the non-PCIe branch of the if/else. Generally it's good =20\n" + "Yes, I figured it was non-PCIe because the code change that you said \n" + "helped was on the non-PCIe branch of the if/else. Generally it's good \n" "to explicitly mention the chip you're using, though.\n" "\n" - "fsl_setup_indirect_pci should be renamed to fsl_setup_indirect_pcie. =20\n" - "Your patch above should be applied, and fsl_setup_indirect_pcie should =20\n" + "fsl_setup_indirect_pci should be renamed to fsl_setup_indirect_pcie. \n" + "Your patch above should be applied, and fsl_setup_indirect_pcie should \n" "be moved into the booke/86xx ifdef to avoid an unused function warning.\n" "\n" - -Scott= + -Scott -24901a0d03cc1538ea91b206094cb07e1b54bb22d0eec41137d6442228eef427 +8b8406f8d2b63413ec78e36722f911123285547cdc8163f88323a1a0de7f85e4
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