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Date: Wed, 3 Jul 2013 14:09:32 -0500
From: Scott Wood <scottwood@freescale.com>
Subject: Re: [PATCH 2/2] powerpc/85xx: add the P1020RDB-PD DTS support
To: Haijun Zhang <Haijun.Zhang@freescale.com>
References: <1372651943-12045-1-git-send-email-Haijun.Zhang@freescale.com>
 <1372651943-12045-2-git-send-email-Haijun.Zhang@freescale.com>
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 (from Haijun.Zhang@freescale.com on Sun Jun 30 23:12:23 2013)
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Cc: Jerry Huang <Chang-Ming.Huang@freescale.com>, linuxppc-dev@lists.ozlabs.org,
 "Haijun.Zhang" <Haijun.Zhang@freescale.com>
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On 06/30/2013 11:12:23 PM, Haijun Zhang wrote:
> From: "Haijun.Zhang" <Haijun.Zhang@freescale.com>
>=20
> Overview of P1020RDB-PD device:
> - DDR3 2GB
> - NOR flash 64MB
> - NAND flash 128MB
> - SPI flash 16MB
> - I2C EEPROM 256Kb
> - eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
> - eTSEC2 (SGMII PHY)
> - eTSEC3 (RGMII PHY)
> - SDHC
> - 2 USB ports
> - 4 TDM ports
> - PCIe
>=20
> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
> CC: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/boot/dts/p1020rdb-pd.dtsi    | 257 =20
> ++++++++++++++++++++++++++++++
>  arch/powerpc/boot/dts/p1020rdb-pd_32b.dts |  90 +++++++++++
>  2 files changed, 347 insertions(+)
>  create mode 100644 arch/powerpc/boot/dts/p1020rdb-pd.dtsi
>  create mode 100644 arch/powerpc/boot/dts/p1020rdb-pd_32b.dts

What about 36b?

> +	cpld@2,0 {
> +		#address-cells =3D <1>;
> +		#size-cells =3D <1>;
> +		compatible =3D "cpld";
> +		reg =3D <0x2 0x0 0x20000>;
> +		read-only;
> +	};

Where does "cpld" as a compatible come from (it's way too vague)?  What =20
is read-only supposed to mean here?

Why do you have #address-cells/#size-cells if there are no child nodes?

-Scott=