From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Wed, 03 Jul 2013 20:18:12 +0000 Subject: Re: [PATCH 1/2] powerpc/booke64: Add LRAT error exception handler Message-Id: <1372882692.8183.150@snotra> List-Id: References: <1372870566-11299-1-git-send-email-mihai.caraman@freescale.com> In-Reply-To: <1372870566-11299-1-git-send-email-mihai.caraman@freescale.com> (from mihai.caraman@freescale.com on Wed Jul 3 11:56:05 2013) MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Mihai Caraman Cc: linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org, kvm@vger.kernel.org, Mihai Caraman On 07/03/2013 11:56:05 AM, Mihai Caraman wrote: > @@ -1410,6 +1423,7 @@ _GLOBAL(setup_doorbell_ivors) > _GLOBAL(setup_ehv_ivors) > SET_IVOR(40, 0x300) /* Embedded Hypervisor System Call */ > SET_IVOR(41, 0x320) /* Embedded Hypervisor Privilege */ > + SET_IVOR(42, 0x340) /* LRAT Error */ What happens if we write to IVOR42 on e5500? If the answer is no-op, is that behavior guaranteed on any CPU with E.HV but not LRAT? -Scott From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from co9outboundpool.messaging.microsoft.com (co9ehsobe005.messaging.microsoft.com [207.46.163.28]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "MSIT Machine Auth CA 2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 5BE282C01FC for ; Thu, 4 Jul 2013 06:18:21 +1000 (EST) Date: Wed, 3 Jul 2013 15:18:12 -0500 From: Scott Wood Subject: Re: [PATCH 1/2] powerpc/booke64: Add LRAT error exception handler To: Mihai Caraman References: <1372870566-11299-1-git-send-email-mihai.caraman@freescale.com> In-Reply-To: <1372870566-11299-1-git-send-email-mihai.caraman@freescale.com> (from mihai.caraman@freescale.com on Wed Jul 3 11:56:05 2013) Message-ID: <1372882692.8183.150@snotra> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; delsp=Yes; format=Flowed Cc: Mihai Caraman , linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 07/03/2013 11:56:05 AM, Mihai Caraman wrote: > @@ -1410,6 +1423,7 @@ _GLOBAL(setup_doorbell_ivors) > _GLOBAL(setup_ehv_ivors) > SET_IVOR(40, 0x300) /* Embedded Hypervisor System Call */ > SET_IVOR(41, 0x320) /* Embedded Hypervisor Privilege */ > + SET_IVOR(42, 0x340) /* LRAT Error */ What happens if we write to IVOR42 on e5500? If the answer is no-op, =20 is that behavior guaranteed on any CPU with E.HV but not LRAT? -Scott= From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Subject: Re: [PATCH 1/2] powerpc/booke64: Add LRAT error exception handler Date: Wed, 3 Jul 2013 15:18:12 -0500 Message-ID: <1372882692.8183.150@snotra> References: <1372870566-11299-1-git-send-email-mihai.caraman@freescale.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; delsp=Yes; format=Flowed Content-Transfer-Encoding: 8BIT Cc: , , , Mihai Caraman To: Mihai Caraman Return-path: Received: from co9ehsobe001.messaging.microsoft.com ([207.46.163.24]:48425 "EHLO co9outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933217Ab3GCUSS convert rfc822-to-8bit (ORCPT ); Wed, 3 Jul 2013 16:18:18 -0400 In-Reply-To: <1372870566-11299-1-git-send-email-mihai.caraman@freescale.com> (from mihai.caraman@freescale.com on Wed Jul 3 11:56:05 2013) Content-Disposition: inline Sender: kvm-owner@vger.kernel.org List-ID: On 07/03/2013 11:56:05 AM, Mihai Caraman wrote: > @@ -1410,6 +1423,7 @@ _GLOBAL(setup_doorbell_ivors) > _GLOBAL(setup_ehv_ivors) > SET_IVOR(40, 0x300) /* Embedded Hypervisor System Call */ > SET_IVOR(41, 0x320) /* Embedded Hypervisor Privilege */ > + SET_IVOR(42, 0x340) /* LRAT Error */ What happens if we write to IVOR42 on e5500? If the answer is no-op, is that behavior guaranteed on any CPU with E.HV but not LRAT? -Scott