diff for duplicates of <1373481762.8183.220@snotra> diff --git a/a/1.txt b/N1/1.txt index 8881cc9..1d1ce56 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,63 +1,63 @@ On 07/10/2013 05:15:09 AM, Alexander Graf wrote: -> +>=20 > On 10.07.2013, at 02:06, Scott Wood wrote: -> +>=20 > > On 07/09/2013 04:44:24 PM, Alexander Graf wrote: > >> On 09.07.2013, at 20:46, Scott Wood wrote: -> >> > I suspect that tlbsx is faster, or at worst similar. And unlike -> comparing tlbsx to lwepx (not counting a fix for the threading -> problem), we don't already have code to search the guest TLB, so +> >> > I suspect that tlbsx is faster, or at worst similar. And unlike =20 +> comparing tlbsx to lwepx (not counting a fix for the threading =20 +> problem), we don't already have code to search the guest TLB, so =20 > testing would be more work. -> >> We have code to walk the guest TLB for TLB misses. This really is +> >> We have code to walk the guest TLB for TLB misses. This really is =20 > just the TLB miss search without host TLB injection. -> >> So let's say we're using the shadow TLB. The guest always has its -> say 64 TLB entries that it can count on - we never evict anything by -> accident, because we store all of the 64 entries in our guest TLB -> cache. When the guest faults at an address, the first thing we do is +> >> So let's say we're using the shadow TLB. The guest always has its =20 +> say 64 TLB entries that it can count on - we never evict anything by =20 +> accident, because we store all of the 64 entries in our guest TLB =20 +> cache. When the guest faults at an address, the first thing we do is =20 > we check the cache whether we have that page already mapped. -> >> However, with this method we now have 2 enumeration methods for -> guest TLB searches. We have the tlbsx one which searches the host TLB -> and we have our guest TLB cache. The guest TLB cache might still -> contain an entry for an address that we already invalidated on the +> >> However, with this method we now have 2 enumeration methods for =20 +> guest TLB searches. We have the tlbsx one which searches the host TLB =20 +> and we have our guest TLB cache. The guest TLB cache might still =20 +> contain an entry for an address that we already invalidated on the =20 > host. Would that impose a problem? -> >> I guess not because we're swizzling the exit code around to -> instead be an instruction miss which means we restore the TLB entry -> into our host's TLB so that when we resume, we land here and the +> >> I guess not because we're swizzling the exit code around to =20 +> instead be an instruction miss which means we restore the TLB entry =20 +> into our host's TLB so that when we resume, we land here and the =20 > tlbsx hits. But it feels backwards. > > -> > Any better way? Searching the guest TLB won't work for the LRAT -> case, so we'd need to have this logic around anyway. We shouldn't -> add a second codepath unless it's a clear performance gain -- and -> again, I suspect it would be the opposite, especially if the entry is -> not in TLB0 or in one of the first few entries searched in TLB1. The +> > Any better way? Searching the guest TLB won't work for the LRAT =20 +> case, so we'd need to have this logic around anyway. We shouldn't =20 +> add a second codepath unless it's a clear performance gain -- and =20 +> again, I suspect it would be the opposite, especially if the entry is =20 +> not in TLB0 or in one of the first few entries searched in TLB1. The =20 > tlbsx miss case is not what we should optimize for. -> +>=20 > Hrm. -> -> So let's redesign this thing theoretically. We would have an exit -> that requires an instruction fetch. We would override -> kvmppc_get_last_inst() to always do kvmppc_ld_inst(). That one can -> fail because it can't find the TLB entry in the host TLB. When it -> fails, we have to abort the emulation and resume the guest at the +>=20 +> So let's redesign this thing theoretically. We would have an exit =20 +> that requires an instruction fetch. We would override =20 +> kvmppc_get_last_inst() to always do kvmppc_ld_inst(). That one can =20 +> fail because it can't find the TLB entry in the host TLB. When it =20 +> fails, we have to abort the emulation and resume the guest at the =20 > same IP. -> -> Now the guest gets the TLB miss, we populate, go back into the guest. -> The guest hits the emulation failure again. We go back to -> kvmppc_ld_inst() which succeeds this time and we can emulate the +>=20 +> Now the guest gets the TLB miss, we populate, go back into the guest. =20 +> The guest hits the emulation failure again. We go back to =20 +> kvmppc_ld_inst() which succeeds this time and we can emulate the =20 > instruction. -That's pretty much what this patch does, except that it goes -immediately to the TLB miss code rather than having the extra -round-trip back to the guest. Is there any benefit from adding that -extra round-trip? Rewriting the exit type instead doesn't seem that +That's pretty much what this patch does, except that it goes =20 +immediately to the TLB miss code rather than having the extra =20 +round-trip back to the guest. Is there any benefit from adding that =20 +extra round-trip? Rewriting the exit type instead doesn't seem that =20 bad... -> I think this works. Just make sure that the gateway to the -> instruction fetch is kvmppc_get_last_inst() and make that failable. -> Then the difference between looking for the TLB entry in the host's +> I think this works. Just make sure that the gateway to the =20 +> instruction fetch is kvmppc_get_last_inst() and make that failable. =20 +> Then the difference between looking for the TLB entry in the host's =20 > TLB or in the guest's TLB cache is hopefully negligible. -I don't follow here. What does this have to do with looking in the +I don't follow here. What does this have to do with looking in the =20 guest TLB? --Scott +-Scott= diff --git a/a/content_digest b/N1/content_digest index 984b363..12c9ddd 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,76 +1,76 @@ "ref\02750D29D-8CE6-40D3-922D-864F447FEFD8@suse.de\0" "From\0Scott Wood <scottwood@freescale.com>\0" "Subject\0Re: [PATCH 2/2] KVM: PPC: Book3E: Get vcpu's last instruction for emulation\0" - "Date\0Wed, 10 Jul 2013 18:42:42 +0000\0" + "Date\0Wed, 10 Jul 2013 13:42:42 -0500\0" "To\0Alexander Graf <agraf@suse.de>\0" "Cc\0Mihai Caraman <mihai.caraman@freescale.com>" - kvm-ppc@vger.kernel.org + linuxppc-dev@lists.ozlabs.org kvm@vger.kernel.org - " linuxppc-dev@lists.ozlabs.org\0" + " kvm-ppc@vger.kernel.org\0" "\00:1\0" "b\0" "On 07/10/2013 05:15:09 AM, Alexander Graf wrote:\n" - "> \n" + ">=20\n" "> On 10.07.2013, at 02:06, Scott Wood wrote:\n" - "> \n" + ">=20\n" "> > On 07/09/2013 04:44:24 PM, Alexander Graf wrote:\n" "> >> On 09.07.2013, at 20:46, Scott Wood wrote:\n" - "> >> > I suspect that tlbsx is faster, or at worst similar. And unlike \n" - "> comparing tlbsx to lwepx (not counting a fix for the threading \n" - "> problem), we don't already have code to search the guest TLB, so \n" + "> >> > I suspect that tlbsx is faster, or at worst similar. And unlike =20\n" + "> comparing tlbsx to lwepx (not counting a fix for the threading =20\n" + "> problem), we don't already have code to search the guest TLB, so =20\n" "> testing would be more work.\n" - "> >> We have code to walk the guest TLB for TLB misses. This really is \n" + "> >> We have code to walk the guest TLB for TLB misses. This really is =20\n" "> just the TLB miss search without host TLB injection.\n" - "> >> So let's say we're using the shadow TLB. The guest always has its \n" - "> say 64 TLB entries that it can count on - we never evict anything by \n" - "> accident, because we store all of the 64 entries in our guest TLB \n" - "> cache. When the guest faults at an address, the first thing we do is \n" + "> >> So let's say we're using the shadow TLB. The guest always has its =20\n" + "> say 64 TLB entries that it can count on - we never evict anything by =20\n" + "> accident, because we store all of the 64 entries in our guest TLB =20\n" + "> cache. When the guest faults at an address, the first thing we do is =20\n" "> we check the cache whether we have that page already mapped.\n" - "> >> However, with this method we now have 2 enumeration methods for \n" - "> guest TLB searches. We have the tlbsx one which searches the host TLB \n" - "> and we have our guest TLB cache. The guest TLB cache might still \n" - "> contain an entry for an address that we already invalidated on the \n" + "> >> However, with this method we now have 2 enumeration methods for =20\n" + "> guest TLB searches. We have the tlbsx one which searches the host TLB =20\n" + "> and we have our guest TLB cache. The guest TLB cache might still =20\n" + "> contain an entry for an address that we already invalidated on the =20\n" "> host. Would that impose a problem?\n" - "> >> I guess not because we're swizzling the exit code around to \n" - "> instead be an instruction miss which means we restore the TLB entry \n" - "> into our host's TLB so that when we resume, we land here and the \n" + "> >> I guess not because we're swizzling the exit code around to =20\n" + "> instead be an instruction miss which means we restore the TLB entry =20\n" + "> into our host's TLB so that when we resume, we land here and the =20\n" "> tlbsx hits. But it feels backwards.\n" "> >\n" - "> > Any better way? Searching the guest TLB won't work for the LRAT \n" - "> case, so we'd need to have this logic around anyway. We shouldn't \n" - "> add a second codepath unless it's a clear performance gain -- and \n" - "> again, I suspect it would be the opposite, especially if the entry is \n" - "> not in TLB0 or in one of the first few entries searched in TLB1. The \n" + "> > Any better way? Searching the guest TLB won't work for the LRAT =20\n" + "> case, so we'd need to have this logic around anyway. We shouldn't =20\n" + "> add a second codepath unless it's a clear performance gain -- and =20\n" + "> again, I suspect it would be the opposite, especially if the entry is =20\n" + "> not in TLB0 or in one of the first few entries searched in TLB1. The =20\n" "> tlbsx miss case is not what we should optimize for.\n" - "> \n" + ">=20\n" "> Hrm.\n" - "> \n" - "> So let's redesign this thing theoretically. We would have an exit \n" - "> that requires an instruction fetch. We would override \n" - "> kvmppc_get_last_inst() to always do kvmppc_ld_inst(). That one can \n" - "> fail because it can't find the TLB entry in the host TLB. When it \n" - "> fails, we have to abort the emulation and resume the guest at the \n" + ">=20\n" + "> So let's redesign this thing theoretically. We would have an exit =20\n" + "> that requires an instruction fetch. We would override =20\n" + "> kvmppc_get_last_inst() to always do kvmppc_ld_inst(). That one can =20\n" + "> fail because it can't find the TLB entry in the host TLB. When it =20\n" + "> fails, we have to abort the emulation and resume the guest at the =20\n" "> same IP.\n" - "> \n" - "> Now the guest gets the TLB miss, we populate, go back into the guest. \n" - "> The guest hits the emulation failure again. We go back to \n" - "> kvmppc_ld_inst() which succeeds this time and we can emulate the \n" + ">=20\n" + "> Now the guest gets the TLB miss, we populate, go back into the guest. =20\n" + "> The guest hits the emulation failure again. We go back to =20\n" + "> kvmppc_ld_inst() which succeeds this time and we can emulate the =20\n" "> instruction.\n" "\n" - "That's pretty much what this patch does, except that it goes \n" - "immediately to the TLB miss code rather than having the extra \n" - "round-trip back to the guest. Is there any benefit from adding that \n" - "extra round-trip? Rewriting the exit type instead doesn't seem that \n" + "That's pretty much what this patch does, except that it goes =20\n" + "immediately to the TLB miss code rather than having the extra =20\n" + "round-trip back to the guest. Is there any benefit from adding that =20\n" + "extra round-trip? Rewriting the exit type instead doesn't seem that =20\n" "bad...\n" "\n" - "> I think this works. Just make sure that the gateway to the \n" - "> instruction fetch is kvmppc_get_last_inst() and make that failable. \n" - "> Then the difference between looking for the TLB entry in the host's \n" + "> I think this works. Just make sure that the gateway to the =20\n" + "> instruction fetch is kvmppc_get_last_inst() and make that failable. =20\n" + "> Then the difference between looking for the TLB entry in the host's =20\n" "> TLB or in the guest's TLB cache is hopefully negligible.\n" "\n" - "I don't follow here. What does this have to do with looking in the \n" + "I don't follow here. What does this have to do with looking in the =20\n" "guest TLB?\n" "\n" - -Scott + -Scott= -6d6d5a14da68d549bc5ae38754037ddef35823f1977c9add4a6c6041c15509f0 +0d98df271aa86a0ff5d5ef1a5918e7e153e91b5bed16ab14eb78b67bc08bf678
diff --git a/a/content_digest b/N2/content_digest index 984b363..e8a6231 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,12 +1,12 @@ "ref\02750D29D-8CE6-40D3-922D-864F447FEFD8@suse.de\0" "From\0Scott Wood <scottwood@freescale.com>\0" "Subject\0Re: [PATCH 2/2] KVM: PPC: Book3E: Get vcpu's last instruction for emulation\0" - "Date\0Wed, 10 Jul 2013 18:42:42 +0000\0" + "Date\0Wed, 10 Jul 2013 13:42:42 -0500\0" "To\0Alexander Graf <agraf@suse.de>\0" "Cc\0Mihai Caraman <mihai.caraman@freescale.com>" - kvm-ppc@vger.kernel.org - kvm@vger.kernel.org - " linuxppc-dev@lists.ozlabs.org\0" + <kvm-ppc@vger.kernel.org> + <kvm@vger.kernel.org> + " <linuxppc-dev@lists.ozlabs.org>\0" "\00:1\0" "b\0" "On 07/10/2013 05:15:09 AM, Alexander Graf wrote:\n" @@ -73,4 +73,4 @@ "\n" -Scott -6d6d5a14da68d549bc5ae38754037ddef35823f1977c9add4a6c6041c15509f0 +e92863f512f96059113fb796dc6dac0902540c3387a06ec9204dab9fd622efe3
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.