From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [Intel-gfx] [PATCH] drm/i915: make user mode sync polarity setting explicit Date: Tue, 30 Jul 2013 15:43:57 +0300 Message-ID: <1375188237.2599.18.camel@intelbox> References: <1375180592-16514-1-git-send-email-imre.deak@intel.com> <20130730105706.GA2616@cantiga.alporthouse.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0834689619==" Return-path: In-Reply-To: <20130730105706.GA2616@cantiga.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============0834689619== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-GUV+fQK9bfLxqpvEFEM0" --=-GUV+fQK9bfLxqpvEFEM0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2013-07-30 at 11:57 +0100, Chris Wilson wrote: > On Tue, Jul 30, 2013 at 01:36:32PM +0300, Imre Deak wrote: > > Userspace can pass a mode with an unspecified vsync/hsync polarity > > setting. All encoders in the Intel driver take this to mean a negative > > polarity setting. The HW readout/state checker code on the other hand > > needs these flags to be explicitly set, otherwise the state checker wil= l > > WARN about the mismatch. > >=20 > > Get rid of the WARN by making the polarity setting explicit in the > > adjusted mode flags based on the requested mode flags. This will keep > > the existing behavior otherwise. > >=20 > > Note that we could guess from the other timing parameters whether the > > user wanted a VESA or other standard mode and set the polarity > > accordingly. This is what the NV driver does > > (drivers/gpu/drm/nouveau/dispnv04/crtc.c), but I think that's not very > > exact and would change the existing behavior of the Intel driver. >=20 > Right, don't guess. If the user wanted the standard mode, then the flags > would have been taken from the standard modeline. > =20 > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=3D65442 >=20 > You can add a tested-by here for qa. Tested-by: Cancan Feng =20 > > Signed-off-by: Imre Deak > Reviewed-by: Chris Wilson CC'ing people who might be interested. After some discussion with Ville, we could refine this further at the drm core level by enforcing the Intel behavior - defaulting to negative polarity and also checking/sanitizing the PHSYNC/PVSYNC flags. PHSYNC/PVSYNC isn't used by the Intel driver so we could still go with the above patch for now and follow-up with a drm core fix. We should probably also reject modes at drm core level where both positive and negative flags are set, again in a separate follow-up patch. --Imre --=-GUV+fQK9bfLxqpvEFEM0 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABAgAGBQJR97UNAAoJEORIIAnNuWDFQ2sH/A+04zY7JdApr5MLXCfVKWX+ D2/tLdW7EoDh8cRst0z9by1BA9HmmFEyweMgtAMlnA+Qe2pRl5DKkt//NmPFHEPo 4R6xVYYVlHaRyj9rU9tiUAauVtX153ubae4DENlF/q3SWYuGmQFaRyUVUUI2VBr+ 9ouQ6NjKcjkjO51eaD9sYltRGf2sD3/W2loTsWNnzAXNaWJ7lJwKvormzA/dLSG2 6s9lJd0n9xHDCimZXZlHKbjyMHjs12JYRoVjcSSq6C8hJV/4twOyBEIyQIy2FQxj 7Utq8OKHvzn4mH8+T7KVjDHqGYxD56K6teFdfvr98JwZOIsoqzcUAeaovWHNZ5w= =eOTZ -----END PGP SIGNATURE----- --=-GUV+fQK9bfLxqpvEFEM0-- --===============0834689619== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel --===============0834689619==--