From: "Hervé Poussineau" <hpoussin@reactos.org>
To: qemu-devel@nongnu.org
Cc: "Hervé Poussineau" <hpoussin@reactos.org>,
" Andreas Färber" <andreas.faerber@web.de>,
qemu-ppc@nongnu.org
Subject: [Qemu-devel] [PATCH v2 10/10] raven: use raven_ for all function prefixes
Date: Wed, 4 Sep 2013 00:29:10 +0200 [thread overview]
Message-ID: <1378247351-8446-11-git-send-email-hpoussin@reactos.org> (raw)
In-Reply-To: <1378247351-8446-1-git-send-email-hpoussin@reactos.org>
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/pci-host/prep.c | 40 +++++++++++++++++++++-------------------
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 38df10c..0de835a 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -69,7 +69,7 @@ typedef struct PRePPCIState {
#define BIOS_SIZE (1024 * 1024)
-static inline uint32_t PPC_PCIIO_config(hwaddr addr)
+static inline uint32_t raven_pci_io_config(hwaddr addr)
{
int i;
@@ -81,36 +81,36 @@ static inline uint32_t PPC_PCIIO_config(hwaddr addr)
return (addr & 0x7ff) | (i << 11);
}
-static void ppc_pci_io_write(void *opaque, hwaddr addr,
- uint64_t val, unsigned int size)
+static void raven_pci_io_write(void *opaque, hwaddr addr,
+ uint64_t val, unsigned int size)
{
PREPPCIState *s = opaque;
PCIHostState *phb = PCI_HOST_BRIDGE(s);
- pci_data_write(phb->bus, PPC_PCIIO_config(addr), val, size);
+ pci_data_write(phb->bus, raven_pci_io_config(addr), val, size);
}
-static uint64_t ppc_pci_io_read(void *opaque, hwaddr addr,
- unsigned int size)
+static uint64_t raven_pci_io_read(void *opaque, hwaddr addr,
+ unsigned int size)
{
PREPPCIState *s = opaque;
PCIHostState *phb = PCI_HOST_BRIDGE(s);
- return pci_data_read(phb->bus, PPC_PCIIO_config(addr), size);
+ return pci_data_read(phb->bus, raven_pci_io_config(addr), size);
}
-static const MemoryRegionOps PPC_PCIIO_ops = {
- .read = ppc_pci_io_read,
- .write = ppc_pci_io_write,
+static const MemoryRegionOps raven_pci_io_ops = {
+ .read = raven_pci_io_read,
+ .write = raven_pci_io_write,
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static uint64_t ppc_intack_read(void *opaque, hwaddr addr,
- unsigned int size)
+static uint64_t raven_intack_read(void *opaque, hwaddr addr,
+ unsigned int size)
{
return pic_read_irq(isa_pic);
}
-static const MemoryRegionOps PPC_intack_ops = {
- .read = ppc_intack_read,
+static const MemoryRegionOps raven_intack_ops = {
+ .read = raven_intack_read,
.valid = {
.max_access_size = 1,
},
@@ -181,12 +181,12 @@ static const MemoryRegionOps raven_io_ops = {
.valid.unaligned = true,
};
-static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
+static int raven_map_irq(PCIDevice *pci_dev, int irq_num)
{
return (irq_num + (pci_dev->devfn >> 3)) & 1;
}
-static void prep_set_irq(void *opaque, int irq_num, int level)
+static void raven_set_irq(void *opaque, int irq_num, int level)
{
qemu_irq *pic = opaque;
@@ -220,7 +220,8 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
qdev_init_gpio_in(d, raven_change_gpio, 1);
- pci_bus_irqs(&s->pci_bus, prep_set_irq, prep_map_irq, s->irq, PCI_NUM_PINS);
+ pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s->irq,
+ PCI_NUM_PINS);
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, s,
"pci-conf-idx", 4);
@@ -230,10 +231,11 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
"pci-conf-data", 4);
memory_region_add_subregion(&s->pci_io, 0xcfc, &h->data_mem);
- memory_region_init_io(&h->mmcfg, OBJECT(s), &PPC_PCIIO_ops, s, "pciio", 0x00400000);
+ memory_region_init_io(&h->mmcfg, OBJECT(s), &raven_pci_io_ops, s,
+ "pciio", 0x00400000);
memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg);
- memory_region_init_io(&s->pci_intack, OBJECT(s), &PPC_intack_ops, s,
+ memory_region_init_io(&s->pci_intack, OBJECT(s), &raven_intack_ops, s,
"pci-intack", 1);
memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->pci_intack);
--
1.7.10.4
prev parent reply other threads:[~2013-09-03 22:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-03 22:29 [Qemu-devel] [PATCH v2 00/10] prep: improve Raven PCI host emulation Hervé Poussineau
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 01/10] prep: kill get_system_io() usage Hervé Poussineau
2013-09-04 6:13 ` Paolo Bonzini
2013-09-04 18:29 ` Hervé Poussineau
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 02/10] raven: use constant PCI_NUM_PINS instead of 4 Hervé Poussineau
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 03/10] raven: move BIOS loading from board code to PCI host Hervé Poussineau
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 04/10] raven: rename intack region to pci_intack Hervé Poussineau
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 05/10] raven: set a correct PCI I/O memory region Hervé Poussineau
2013-09-04 6:01 ` Paolo Bonzini
2013-09-04 7:22 ` Peter Maydell
2013-09-04 8:11 ` Paolo Bonzini
2013-09-04 8:25 ` Peter Maydell
2013-09-04 8:31 ` Paolo Bonzini
2013-09-04 8:51 ` Peter Maydell
2013-09-04 8:54 ` Andreas Färber
2013-09-09 20:57 ` Hervé Poussineau
2013-09-09 21:33 ` Peter Maydell
2013-09-10 7:43 ` Paolo Bonzini
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 06/10] raven: set a correct PCI " Hervé Poussineau
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 07/10] raven: add PCI bus mastering address space Hervé Poussineau
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 08/10] raven: implement non-contiguous I/O region Hervé Poussineau
2013-09-03 22:29 ` [Qemu-devel] [PATCH v2 09/10] raven: fix PCI bus accesses with size > 1 Hervé Poussineau
2013-09-03 22:29 ` Hervé Poussineau [this message]
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