diff for duplicates of <1383343739-23080-11-git-send-email-sboyd@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index 9f33a5e..d4d4cc7 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -27,13 +27,13 @@ index 91efaec..0621037c 100644 + compatible = "qcom,krait"; + enable-method = "qcom,mmio"; + -+ cpu@0 { ++ cpu at 0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; + }; + -+ cpu@1 { ++ cpu at 1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; @@ -46,20 +46,20 @@ index 91efaec..0621037c 100644 + }; + }; + - intc: interrupt-controller@2000000 { + intc: interrupt-controller at 2000000 { compatible = "qcom,msm-qgic2"; interrupt-controller; @@ -53,6 +79,12 @@ #reset-cells = <1>; }; -+ clock-controller@2008000 { ++ clock-controller at 2008000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02008000 0x1000>; + cpu-offset = <0x80000>; + }; + - serial@16440000 { + serial at 16440000 { compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x16440000 0x1000>, diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -77,25 +77,25 @@ index 152879d..0eac2ea 100644 + compatible = "qcom,krait"; + enable-method = "qcom,mmio"; + -+ cpu@0 { ++ cpu at 0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; + }; + -+ cpu@1 { ++ cpu at 1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; + }; + -+ cpu@2 { ++ cpu at 2 { + device_type = "cpu"; + reg = <2>; + next-level-cache = <&L2>; + }; + -+ cpu@3 { ++ cpu at 3 { + device_type = "cpu"; + reg = <3>; + next-level-cache = <&L2>; @@ -115,18 +115,18 @@ index 152879d..0eac2ea 100644 }; }; -+ regulator@f9012000 { ++ regulator at f9012000 { + compatible = "qcom,l2-saw2", "qcom,saw2"; + reg = <0xf9012000 0x1000>; + }; + -+ clock-controller@f9008000 { ++ clock-controller at f9008000 { + compatible = "qcom,kpss-acc-v2"; + reg = <0xf9008000 0x1000>; + cpu-offset = <0x80000>; + }; + - restart@fc4ab000 { + restart at fc4ab000 { compatible = "qcom,pshold"; reg = <0xfc4ab000 0x4>; -- diff --git a/a/content_digest b/N1/content_digest index 74f80ac..5c15b1a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,12 +1,8 @@ "ref\01383343739-23080-1-git-send-email-sboyd@codeaurora.org\0" - "From\0Stephen Boyd <sboyd@codeaurora.org>\0" + "From\0sboyd@codeaurora.org (Stephen Boyd)\0" "Subject\0[PATCH 10/11] ARM: dts: msm: Add nodes necessary for SMP boot\0" "Date\0Fri, 1 Nov 2013 15:08:58 -0700\0" "To\0linux-arm-kernel@lists.infradead.org\0" - "Cc\0Rohit Vaswani <rvaswani@codeaurora.org>" - David Brown <davidb@codeaurora.org> - linux-kernel@vger.kernel.org - " linux-arm-msm@vger.kernel.org\0" "\00:1\0" "b\0" "From: Rohit Vaswani <rvaswani@codeaurora.org>\n" @@ -38,13 +34,13 @@ "+\t\tcompatible = \"qcom,krait\";\n" "+\t\tenable-method = \"qcom,mmio\";\n" "+\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <0>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@1 {\n" + "+\t\tcpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <1>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -57,20 +53,20 @@ "+\t\t};\n" "+\t};\n" "+\n" - " \tintc: interrupt-controller@2000000 {\n" + " \tintc: interrupt-controller at 2000000 {\n" " \t\tcompatible = \"qcom,msm-qgic2\";\n" " \t\tinterrupt-controller;\n" "@@ -53,6 +79,12 @@\n" " \t\t#reset-cells = <1>;\n" " \t};\n" " \n" - "+\tclock-controller@2008000 {\n" + "+\tclock-controller at 2008000 {\n" "+\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\treg = <0x02008000 0x1000>;\n" "+\t\tcpu-offset = <0x80000>;\n" "+\t};\n" "+\n" - " \tserial@16440000 {\n" + " \tserial at 16440000 {\n" " \t\tcompatible = \"qcom,msm-uartdm-v1.3\", \"qcom,msm-uartdm\";\n" " \t\treg = <0x16440000 0x1000>,\n" "diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi\n" @@ -88,25 +84,25 @@ "+\t\tcompatible = \"qcom,krait\";\n" "+\t\tenable-method = \"qcom,mmio\";\n" "+\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <0>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@1 {\n" + "+\t\tcpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <1>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@2 {\n" + "+\t\tcpu at 2 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <2>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@3 {\n" + "+\t\tcpu at 3 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <3>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -126,22 +122,22 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "+\t\tregulator@f9012000 {\n" + "+\t\tregulator at f9012000 {\n" "+\t\t\tcompatible = \"qcom,l2-saw2\", \"qcom,saw2\";\n" "+\t\t\treg = <0xf9012000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tclock-controller@f9008000 {\n" + "+\t\tclock-controller at f9008000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v2\";\n" "+\t\t\treg = <0xf9008000 0x1000>;\n" "+\t\t\tcpu-offset = <0x80000>;\n" "+\t\t};\n" "+\n" - " \t\trestart@fc4ab000 {\n" + " \t\trestart at fc4ab000 {\n" " \t\t\tcompatible = \"qcom,pshold\";\n" " \t\t\treg = <0xfc4ab000 0x4>;\n" "-- \n" "The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\n" hosted by The Linux Foundation -f60e3f002ec8a803930bb21450b4c2919996be7538b8086c9776a606beaa660b +6eceb91e8a7093620d258e1afab0140b558b1848f9915744a8ead3d9d0cb710d
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