From mboxrd@z Thu Jan  1 00:00:00 1970
From: Dario Faggioli <dario.faggioli@citrix.com>
Subject: Re: [PATCH v2 1/2] arinc: Add cpu-pool support to
 scheduler.
Date: Wed, 4 Dec 2013 12:00:17 +0100
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To: Nathan Studer <nate.studer@dornerworks.com>
Cc: Simon Martin <smartin@milliways.cl>, Ian Campbell <ian.campbell@citrix.com>, Stefano Stabellini <stefano.stabellini@eu.citrix.com>, George Dunlap <george.dunlap@eu.citrix.com>, Andrew Cooper <andrew.cooper3@citrix.com>, Ian Jackson <ian.jackson@eu.citrix.com>, Robert VanVossen <robert.vanvossen@dornerworks.com>, xen-devel@lists.xen.org
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On mar, 2013-12-03 at 17:24 -0500, Nathan Studer wrote:
> From: Nathan Studer <nate.studer@dornerworks.com>
>=20
> 1.  Remove the restriction that dom0 must be in the schedule, since dom-0=
 may
> not belong to the scheduler's pool.
> 2.  Add a schedule entry for each of dom-0's vcpus as they are created.
> 3.  Add code to deal with empty schedules in the do_schedule function.
> 4.  Call the correct idle task for the pcpu on which the scheduling decis=
ion
> is being made in do_schedule.
> 5.  Add code to prevent migration of a vcpu.
> 6.  Implement a proper cpu_pick function, which prefers the current proce=
ssor.
> 7.  Add a scheduler lock to protect access to global variables from multi=
ple
>     PCPUs.
>=20
> These changes do not implement arinc653 multicore.  Since the schedule on=
ly
> supports 1 vcpu entry per slot, even if the vcpus of a domain are run on
> multiple pcpus, the scheduler will essentially serialize their execution.
>=20
> Signed-off-by: Nathan Studer <nate.studer@dornerworks.com>

I'm not yet familiar enough with the details of the algorithm itself
yet, but still, FWIW:

Reviewed-by: Dario Faggioli <dario.faggioli@citrix.com>

--=20
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Senior Software Engineer, Citrix Systems R&D Ltd., Cambridge (UK)


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