diff for duplicates of <1387845593-10050-10-git-send-email-sboyd@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index d855fb6..4f49a5b 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -27,13 +27,13 @@ index 20cb9ad..c72325e 100644 + compatible = "qcom,scorpion"; + enable-method = "qcom,gcc-msm8660"; + -+ cpu@0 { ++ cpu at 0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; + }; + -+ cpu@1 { ++ cpu at 1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; @@ -45,7 +45,7 @@ index 20cb9ad..c72325e 100644 + }; + }; + - intc: interrupt-controller@2080000 { + intc: interrupt-controller at 2080000 { compatible = "qcom,msm-8660-qgic"; interrupt-controller; diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts @@ -63,7 +63,7 @@ index d5b1318..bb20f94 100644 + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + -+ cpu@0 { ++ cpu at 0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; @@ -71,7 +71,7 @@ index d5b1318..bb20f94 100644 + qcom,saw = <&saw0>; + }; + -+ cpu@1 { ++ cpu at 1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; @@ -86,36 +86,36 @@ index d5b1318..bb20f94 100644 + }; + }; + - intc: interrupt-controller@2000000 { + intc: interrupt-controller at 2000000 { compatible = "qcom,msm-qgic2"; interrupt-controller; @@ -53,6 +83,28 @@ #reset-cells = <1>; }; -+ acc0: clock-controller@2088000 { ++ acc0: clock-controller at 2088000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + }; + -+ acc1: clock-controller@2098000 { ++ acc1: clock-controller at 2098000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + }; + -+ saw0: regulator@2089000 { ++ saw0: regulator at 2089000 { + compatible = "qcom,saw2"; + reg = <0x02089000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + -+ saw1: regulator@2099000 { ++ saw1: regulator at 2099000 { + compatible = "qcom,saw2"; + reg = <0x02099000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + - serial@16440000 { + serial at 16440000 { compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x16440000 0x1000>, diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -133,28 +133,28 @@ index 9fa57d7..22555f6 100644 + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v2"; + -+ cpu@0 { ++ cpu at 0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; + qcom,acc = <&acc0>; + }; + -+ cpu@1 { ++ cpu at 1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; + qcom,acc = <&acc1>; + }; + -+ cpu@2 { ++ cpu at 2 { + device_type = "cpu"; + reg = <2>; + next-level-cache = <&L2>; + qcom,acc = <&acc2>; + }; + -+ cpu@3 { ++ cpu at 3 { + device_type = "cpu"; + reg = <3>; + next-level-cache = <&L2>; @@ -176,33 +176,33 @@ index 9fa57d7..22555f6 100644 }; }; -+ saw_l2: regulator@f9012000 { ++ saw_l2: regulator at f9012000 { + compatible = "qcom,saw2"; + reg = <0xf9012000 0x1000>; + regulator; + }; + -+ acc0: clock-controller@f9088000 { ++ acc0: clock-controller at f9088000 { + compatible = "qcom,kpss-acc-v2"; + reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>; + }; + -+ acc1: clock-controller@f9098000 { ++ acc1: clock-controller at f9098000 { + compatible = "qcom,kpss-acc-v2"; + reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>; + }; + -+ acc2: clock-controller@f90a8000 { ++ acc2: clock-controller at f90a8000 { + compatible = "qcom,kpss-acc-v2"; + reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>; + }; + -+ acc3: clock-controller@f90b8000 { ++ acc3: clock-controller at f90b8000 { + compatible = "qcom,kpss-acc-v2"; + reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>; + }; + - restart@fc4ab000 { + restart at fc4ab000 { compatible = "qcom,pshold"; reg = <0xfc4ab000 0x4>; -- diff --git a/a/content_digest b/N1/content_digest index 61019c3..ae99a13 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,17 +1,8 @@ "ref\01387845593-10050-1-git-send-email-sboyd@codeaurora.org\0" - "From\0Stephen Boyd <sboyd@codeaurora.org>\0" + "From\0sboyd@codeaurora.org (Stephen Boyd)\0" "Subject\0[PATCH v2 9/9] ARM: dts: msm: Add nodes necessary for SMP boot\0" "Date\0Mon, 23 Dec 2013 16:39:53 -0800\0" "To\0linux-arm-kernel@lists.infradead.org\0" - "Cc\0Rohit Vaswani <rvaswani@codeaurora.org>" - David Brown <davidb@codeaurora.org> - linux-kernel@vger.kernel.org - linux-arm-msm@vger.kernel.org - Kumar Gala <galak@codeaurora.org> - devicetree@vger.kernel.org - Mark Rutland <mark.rutland@arm.com> - Arnd Bergmann <arnd@arndb.de> - " Russell King <linux@arm.linux.org.uk>\0" "\00:1\0" "b\0" "From: Rohit Vaswani <rvaswani@codeaurora.org>\n" @@ -43,13 +34,13 @@ "+\t\tcompatible = \"qcom,scorpion\";\n" "+\t\tenable-method = \"qcom,gcc-msm8660\";\n" "+\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <0>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@1 {\n" + "+\t\tcpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <1>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -61,7 +52,7 @@ "+\t\t};\n" "+\t};\n" "+\n" - " \tintc: interrupt-controller@2080000 {\n" + " \tintc: interrupt-controller at 2080000 {\n" " \t\tcompatible = \"qcom,msm-8660-qgic\";\n" " \t\tinterrupt-controller;\n" "diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts\n" @@ -79,7 +70,7 @@ "+\t\tcompatible = \"qcom,krait\";\n" "+\t\tenable-method = \"qcom,kpss-acc-v1\";\n" "+\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <0>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -87,7 +78,7 @@ "+\t\t\tqcom,saw = <&saw0>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@1 {\n" + "+\t\tcpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <1>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -102,36 +93,36 @@ "+\t\t};\n" "+\t};\n" "+\n" - " \tintc: interrupt-controller@2000000 {\n" + " \tintc: interrupt-controller at 2000000 {\n" " \t\tcompatible = \"qcom,msm-qgic2\";\n" " \t\tinterrupt-controller;\n" "@@ -53,6 +83,28 @@\n" " \t\t#reset-cells = <1>;\n" " \t};\n" " \n" - "+\tacc0: clock-controller@2088000 {\n" + "+\tacc0: clock-controller at 2088000 {\n" "+\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\treg = <0x02088000 0x1000>, <0x02008000 0x1000>;\n" "+\t};\n" "+\n" - "+\tacc1: clock-controller@2098000 {\n" + "+\tacc1: clock-controller at 2098000 {\n" "+\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\treg = <0x02098000 0x1000>, <0x02008000 0x1000>;\n" "+\t};\n" "+\n" - "+\tsaw0: regulator@2089000 {\n" + "+\tsaw0: regulator at 2089000 {\n" "+\t\tcompatible = \"qcom,saw2\";\n" "+\t\treg = <0x02089000 0x1000>, <0x02009000 0x1000>;\n" "+\t\tregulator;\n" "+\t};\n" "+\n" - "+\tsaw1: regulator@2099000 {\n" + "+\tsaw1: regulator at 2099000 {\n" "+\t\tcompatible = \"qcom,saw2\";\n" "+\t\treg = <0x02099000 0x1000>, <0x02009000 0x1000>;\n" "+\t\tregulator;\n" "+\t};\n" "+\n" - " \tserial@16440000 {\n" + " \tserial at 16440000 {\n" " \t\tcompatible = \"qcom,msm-uartdm-v1.3\", \"qcom,msm-uartdm\";\n" " \t\treg = <0x16440000 0x1000>,\n" "diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi\n" @@ -149,28 +140,28 @@ "+\t\tcompatible = \"qcom,krait\";\n" "+\t\tenable-method = \"qcom,kpss-acc-v2\";\n" "+\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <0>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t\tqcom,acc = <&acc0>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@1 {\n" + "+\t\tcpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <1>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t\tqcom,acc = <&acc1>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@2 {\n" + "+\t\tcpu at 2 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <2>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t\tqcom,acc = <&acc2>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@3 {\n" + "+\t\tcpu at 3 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <3>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -192,37 +183,37 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "+\t\tsaw_l2: regulator@f9012000 {\n" + "+\t\tsaw_l2: regulator at f9012000 {\n" "+\t\t\tcompatible = \"qcom,saw2\";\n" "+\t\t\treg = <0xf9012000 0x1000>;\n" "+\t\t\tregulator;\n" "+\t\t};\n" "+\n" - "+\t\tacc0: clock-controller@f9088000 {\n" + "+\t\tacc0: clock-controller at f9088000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v2\";\n" "+\t\t\treg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc1: clock-controller@f9098000 {\n" + "+\t\tacc1: clock-controller at f9098000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v2\";\n" "+\t\t\treg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc2: clock-controller@f90a8000 {\n" + "+\t\tacc2: clock-controller at f90a8000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v2\";\n" "+\t\t\treg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc3: clock-controller@f90b8000 {\n" + "+\t\tacc3: clock-controller at f90b8000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v2\";\n" "+\t\t\treg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;\n" "+\t\t};\n" "+\n" - " \t\trestart@fc4ab000 {\n" + " \t\trestart at fc4ab000 {\n" " \t\t\tcompatible = \"qcom,pshold\";\n" " \t\t\treg = <0xfc4ab000 0x4>;\n" "-- \n" "The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\n" hosted by The Linux Foundation -ff206469c4c15780e31d4842160d08bcbadb3cb8757bd2a877e468059a66682a +fbe6eff69e3a95b70b1add9fef3d9c2e64adf99152a1ee746d0565bdbea5b944
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