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From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [V6 PATCH 10/18] target-ppc: VSX Stage 4: Add xssqrtsp
Date: Fri, 10 Jan 2014 13:07:54 -0600	[thread overview]
Message-ID: <1389380882-5597-11-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1389380882-5597-1-git-send-email-tommusta@gmail.com>

This patch adds the VSX Scalar Square Root Single Precision (xssqrtsp)
instruction.

The existing VSX_SQRT() macro is modified to support rounding of the
intermediate double-precision result to single-precision.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
V2: Updated conversion to single precision range.

 target-ppc/fpu_helper.c |   13 +++++++++----
 target-ppc/helper.h     |    1 +
 target-ppc/translate.c  |    2 ++
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index ac52c23..fec9d1b 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1969,7 +1969,7 @@ VSX_RE(xvresp, 4, float32, f32, 0, 0)
  *   fld   - vsr_t field (f32 or f64)
  *   sfprf - set FPRF
  */
-#define VSX_SQRT(op, nels, tp, fld, sfprf)                                   \
+#define VSX_SQRT(op, nels, tp, fld, sfprf, r2sp)                             \
 void helper_##op(CPUPPCState *env, uint32_t opcode)                          \
 {                                                                            \
     ppc_vsr_t xt, xb;                                                        \
@@ -1993,6 +1993,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)                          \
             }                                                                \
         }                                                                    \
                                                                              \
+        if (r2sp) {                                                          \
+            xt.fld[i] = helper_frsp(env, xt.fld[i]);                         \
+        }                                                                    \
+                                                                             \
         if (sfprf) {                                                         \
             helper_compute_fprf(env, xt.fld[i], sfprf);                      \
         }                                                                    \
@@ -2002,9 +2006,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)                          \
     helper_float_check_status(env);                                          \
 }
 
-VSX_SQRT(xssqrtdp, 1, float64, f64, 1)
-VSX_SQRT(xvsqrtdp, 2, float64, f64, 0)
-VSX_SQRT(xvsqrtsp, 4, float32, f32, 0)
+VSX_SQRT(xssqrtdp, 1, float64, f64, 1, 0)
+VSX_SQRT(xssqrtsp, 1, float64, f64, 1, 1)
+VSX_SQRT(xvsqrtdp, 2, float64, f64, 0, 0)
+VSX_SQRT(xvsqrtsp, 4, float32, f32, 0, 0)
 
 /* VSX_RSQRTE - VSX floating point reciprocal square root estimate
  *   op    - instruction mnemonic
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index b1cf3c0..0192043 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -291,6 +291,7 @@ DEF_HELPER_2(xssubsp, void, env, i32)
 DEF_HELPER_2(xsmulsp, void, env, i32)
 DEF_HELPER_2(xsdivsp, void, env, i32)
 DEF_HELPER_2(xsresp, void, env, i32)
+DEF_HELPER_2(xssqrtsp, void, env, i32)
 
 DEF_HELPER_2(xvadddp, void, env, i32)
 DEF_HELPER_2(xvsubdp, void, env, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 3108a29..f4c1f42 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7363,6 +7363,7 @@ GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207)
 GEN_VSX_HELPER_2(xsmulsp, 0x00, 0x02, 0, PPC2_VSX207)
 GEN_VSX_HELPER_2(xsdivsp, 0x00, 0x03, 0, PPC2_VSX207)
 GEN_VSX_HELPER_2(xsresp, 0x14, 0x01, 0, PPC2_VSX207)
+GEN_VSX_HELPER_2(xssqrtsp, 0x16, 0x00, 0, PPC2_VSX207)
 
 GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
 GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
@@ -10175,6 +10176,7 @@ GEN_XX3FORM(xssubsp, 0x00, 0x01, PPC2_VSX207),
 GEN_XX3FORM(xsmulsp, 0x00, 0x02, PPC2_VSX207),
 GEN_XX3FORM(xsdivsp, 0x00, 0x03, PPC2_VSX207),
 GEN_XX2FORM(xsresp,  0x14, 0x01, PPC2_VSX207),
+GEN_XX2FORM(xssqrtsp,  0x16, 0x00, PPC2_VSX207),
 
 GEN_XX3FORM(xvadddp, 0x00, 0x0C, PPC2_VSX),
 GEN_XX3FORM(xvsubdp, 0x00, 0x0D, PPC2_VSX),
-- 
1.7.1

  parent reply	other threads:[~2014-01-10 19:09 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-01-10 19:07 [Qemu-devel] [V6 PATCH 00/18] target-ppc: VSX Stage 4 Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 01/18] target-ppc: VSX Stage 4: Add VSX 2.07 Flag Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 02/18] target-ppc: VSX Stage 4: Refactor lxsdx Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 03/18] target-ppc: VSX Stage 4: Add lxsiwax, lxsiwzx and lxsspx Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 04/18] target-ppc: VSX Stage 4: Refactor stxsdx Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 05/18] target-ppc: VSX Stage 4: Add stxsiwx and stxsspx Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 06/18] target-ppc: VSX Stage 4: Add xsaddsp and xssubsp Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 07/18] target-ppc: VSX Stage 4: Add xsmulsp Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 08/18] target-ppc: VSX Stage 4: Add xsdivsp Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 09/18] target-ppc: VSX Stage 4: Add xsresp Tom Musta
2014-01-10 19:07 ` Tom Musta [this message]
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 11/18] target-ppc: VSX Stage 4: add xsrsqrtesp Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 12/18] target-ppc: VSX Stage 4: Add Scalar SP Fused Multiply-Adds Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 13/18] target-ppc: VSX Stage 4: Add xscvsxdsp and xscvuxdsp Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 14/18] target-ppc: VSX Stage 4: Add xxleqv, xxlnand and xxlorc Tom Musta
2014-01-10 19:07 ` [Qemu-devel] [V6 PATCH 15/18] target-ppc: Move To/From VSR Instructions Tom Musta
2014-01-10 21:29   ` Richard Henderson
2014-01-14 14:14     ` Tom Musta
2014-01-15 21:07       ` Richard Henderson
2014-01-10 19:08 ` [Qemu-devel] [V6 PATCH 16/18] target-ppc: Floating Merge Word Instructions Tom Musta
2014-01-10 21:34   ` Richard Henderson
2014-01-10 19:08 ` [Qemu-devel] [V6 PATCH 17/18] target-ppc: Scalar Round to Single Precision Tom Musta
2014-01-10 21:40   ` Richard Henderson
2014-01-10 19:08 ` [Qemu-devel] [V6 PATCH 18/18] target-ppc: Scalar Non-Signalling Conversions Tom Musta
2014-01-10 21:42   ` Richard Henderson

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