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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Scott Wood <scottwood@freescale.com>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v2] powerpc/booke-64: fix tlbsrx. path in bolted tlb handler
Date: Mon, 13 Jan 2014 10:27:20 +1100	[thread overview]
Message-ID: <1389569240.4672.113.camel@pasglop> (raw)
In-Reply-To: <1389396656-27813-1-git-send-email-scottwood@freescale.com>

On Fri, 2014-01-10 at 17:30 -0600, Scott Wood wrote:
> From: Scott Wood <scott@tyr.buserror.net>
> 
> It was branching to the cleanup part of the non-bolted handler,
> which would have been bad if there were any chips with tlbsrx.
> that use the bolted handler.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> v2: rebase

Ack.

>  arch/powerpc/mm/tlb_low_64e.S | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
> index 75f5d27..16250b1 100644
> --- a/arch/powerpc/mm/tlb_low_64e.S
> +++ b/arch/powerpc/mm/tlb_low_64e.S
> @@ -136,7 +136,7 @@ BEGIN_MMU_FTR_SECTION
>  	 */
>  	PPC_TLBSRX_DOT(0,R16)
>  	ldx	r14,r14,r15		/* grab pgd entry */
> -	beq	normal_tlb_miss_done	/* tlb exists already, bail */
> +	beq	tlb_miss_done_bolted	/* tlb exists already, bail */
>  MMU_FTR_SECTION_ELSE
>  	ldx	r14,r14,r15		/* grab pgd entry */
>  ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV)
> @@ -192,6 +192,7 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV)
>  	mtspr	SPRN_MAS7_MAS3,r15
>  	tlbwe
>  
> +tlb_miss_done_bolted:
>  	TLB_MISS_STATS_X(MMSTAT_TLB_MISS_NORM_OK)
>  	tlb_epilog_bolted
>  	rfi

      reply	other threads:[~2014-01-12 23:27 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-01-10 23:30 [PATCH v2] powerpc/booke-64: fix tlbsrx. path in bolted tlb handler Scott Wood
2014-01-12 23:27 ` Benjamin Herrenschmidt [this message]

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