Re: dts file with usb entry for dragonboard

["Ivan T. Ivanov" <iivanov@mm-sol.com>]

Hi, 

On Thu, 2014-01-30 at 11:06 +0100, Andreas Färber wrote:
> Hi,
> 
> Am 29.01.2014 23:19, schrieb Tim Bird:
> > I'm looking at the USB patches you posted in November.  I'd like
> > to test them on a dragonboard I've got here.  Could you possibly send
> > me your dts file for the dragonboard, or let me know where I might
> > get one with correpsonding bindings for the dragonboard (apq8074)?
> 
> It looked as if there is one queued for 3.14 here:
> 
> http://git.kernel.org/cgit/linux/kernel/git/davidb/linux-msm.git/commit/?h=for-3.14/boards&id=e1959aadd4fdb804da85dbd2c6d11021811db7a3
> 
> HTH,
> Andreas
> 

Well, you will not get too far with just these files. I am using 
DTS files available in CAF repository with new Qualcomm clock 
controller driver and one ugly patch which "port" regulator drivers
to upstream kernel.

USB3.0 patches are not really tested because I can not 
get one of the PHY clocks up.

USB2.0 driver is working fine with following DTS bindings.

Regards,
Ivan

	usb2_phy: usb@f9a55000 {
		compatible = "qcom,usb-otg-snps";
		status = "disabled";

		reg = <0xf9a55000 0x400>;
		interrupts = <0 134 0>;

		vddcx-supply = <&pm8841_s2_corner>;
		v1p8-supply = <&pm8941_l6>;
		v3p3-supply = <&pm8941_l24>;

		dr_mode = "peripheral";
		qcom,phy-init-sequence = <0x63 0x81 0xffffffff>;
		qcom,otg-control = <1>;
		qcom,vdd-levels = <1 5 7>;

		resets = <&gcc GCC_USB2A_PHY_BCR>, <&gcc GCC_USB_HS_BCR>;
		reset-names = "phy", "link";

                clocks = <&gcc GCC_XO_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>,
                            <&gcc GCC_USB_HS_AHB_CLK>;
                clock-names = "phy", "core", "iface";
	};

	gadget@f9a55000 {
		compatible = "qcom,ci-hdrc";
		reg = <0xf9a55000 0x400>;
		dr_mode = "peripheral";
		interrupts = <0 134 0>;
		interrupt-names = "core_irq";
                usb-phy = <&usb2_phy>;
	};