From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32823) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WI3nr-00073C-5C for qemu-devel@nongnu.org; Mon, 24 Feb 2014 17:15:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WI3nk-0006el-Jw for qemu-devel@nongnu.org; Mon, 24 Feb 2014 17:15:11 -0500 Received: from mail-oa0-x236.google.com ([2607:f8b0:4003:c02::236]:62210) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WI3nk-0006dW-BP for qemu-devel@nongnu.org; Mon, 24 Feb 2014 17:15:04 -0500 Received: by mail-oa0-f54.google.com with SMTP id m1so1981915oag.13 for ; Mon, 24 Feb 2014 14:15:03 -0800 (PST) From: Rob Herring Date: Mon, 24 Feb 2014 16:14:46 -0600 Message-Id: <1393280086-19431-2-git-send-email-robherring2@gmail.com> In-Reply-To: <1393280086-19431-1-git-send-email-robherring2@gmail.com> References: <1393280086-19431-1-git-send-email-robherring2@gmail.com> Subject: [Qemu-devel] [PATCH 2/2] arm: highbank: setup custom MPIDR value List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Rob Herring , qemu-devel@nongnu.org From: Rob Herring Calxeda highbank platform uses a cluster id of 9 which makes MPIDR register be 0x8000090n where n is the core number. This causes problems on current kernels expecting the MPIDR to match DT cpu reg property. Midway is "normal" and has a cluster id of 0, so it does not need this override. Signed-off-by: Rob Herring --- hw/arm/highbank.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index d76a1d1..e73d86f 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -241,6 +241,15 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) error_report("%s", error_get_pretty(err)); exit(1); } + + if (machine == CALXEDA_HIGHBANK) { + object_property_set_int(OBJECT(cpu), 0x80000900 | n, "mpidr", + &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + } object_property_set_bool(OBJECT(cpu), true, "realized", &err); if (err) { error_report("%s", error_get_pretty(err)); -- 1.8.3.2