diff for duplicates of <1394647664-8258-9-git-send-email-b.brezillon.dev@gmail.com> diff --git a/a/1.txt b/N1/1.txt index ec8e332..87eca03 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -14,7 +14,7 @@ index 4c14ed8..c8095c5 100644 allwinner,pull = <0>; }; + -+ nand_pins_a: nand_base0@0 { ++ nand_pins_a: nand_base0 at 0 { + allwinner,pins = "PC0", "PC1", "PC2", + "PC5", "PC8", "PC9", "PC10", + "PC11", "PC12", "PC13", "PC14", @@ -24,70 +24,70 @@ index 4c14ed8..c8095c5 100644 + allwinner,pull = <0>; + }; + -+ nand_cs0_pins_a: nand_cs@0 { ++ nand_cs0_pins_a: nand_cs at 0 { + allwinner,pins = "PC4"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_cs1_pins_a: nand_cs@1 { ++ nand_cs1_pins_a: nand_cs at 1 { + allwinner,pins = "PC3"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_cs2_pins_a: nand_cs@2 { ++ nand_cs2_pins_a: nand_cs at 2 { + allwinner,pins = "PC17"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_cs3_pins_a: nand_cs@3 { ++ nand_cs3_pins_a: nand_cs at 3 { + allwinner,pins = "PC18"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_cs4_pins_a: nand_cs@4 { ++ nand_cs4_pins_a: nand_cs at 4 { + allwinner,pins = "PC19"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_cs5_pins_a: nand_cs@5 { ++ nand_cs5_pins_a: nand_cs at 5 { + allwinner,pins = "PC20"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_cs6_pins_a: nand_cs@6 { ++ nand_cs6_pins_a: nand_cs at 6 { + allwinner,pins = "PC21"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_cs7_pins_a: nand_cs@7 { ++ nand_cs7_pins_a: nand_cs at 7 { + allwinner,pins = "PC22"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_rb0_pins_a: nand_rb@0 { ++ nand_rb0_pins_a: nand_rb at 0 { + allwinner,pins = "PC6"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + -+ nand_rb1_pins_a: nand_rb@1 { ++ nand_rb1_pins_a: nand_rb at 1 { + allwinner,pins = "PC7"; + allwinner,function = "nand0"; + allwinner,drive = <0>; @@ -95,6 +95,6 @@ index 4c14ed8..c8095c5 100644 + }; }; - timer@01c20c00 { + timer at 01c20c00 { -- 1.7.9.5 diff --git a/a/content_digest b/N1/content_digest index 19fb1ee..e4c28cc 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,21 +1,8 @@ "ref\01394647664-8258-1-git-send-email-b.brezillon.dev@gmail.com\0" - "From\0Boris BREZILLON <b.brezillon.dev@gmail.com>\0" + "From\0b.brezillon.dev@gmail.com (Boris BREZILLON)\0" "Subject\0[PATCH v3 8/9] ARM: dt/sunxi: add A20 NAND controller pin definitions\0" "Date\0Wed, 12 Mar 2014 19:07:43 +0100\0" - "To\0Maxime Ripard <maxime.ripard@free-electrons.com>" - Rob Herring <robherring2@gmail.com> - David Woodhouse <dwmw2@infradead.org> - Grant Likely <grant.likely@linaro.org> - Brian Norris <computersforpeace@gmail.com> - Jason Gunthorpe <jgunthorpe@obsidianresearch.com> - " Arnd Bergmann <arnd@arndb.de>\0" - "Cc\0devicetree@vger.kernel.org" - Boris BREZILLON <b.brezillon.dev@gmail.com> - linux-doc@vger.kernel.org - dev@linux-sunxi.org - linux-kernel@vger.kernel.org - linux-mtd@lists.infradead.org - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Define the NAND controller pin configs.\n" @@ -34,7 +21,7 @@ " \t\t\t\tallwinner,pull = <0>;\n" " \t\t\t};\n" "+\n" - "+\t\t\tnand_pins_a: nand_base0@0 {\n" + "+\t\t\tnand_pins_a: nand_base0 at 0 {\n" "+\t\t\t\tallwinner,pins = \"PC0\", \"PC1\", \"PC2\",\n" "+\t\t\t\t\t\t\"PC5\", \"PC8\", \"PC9\", \"PC10\",\n" "+\t\t\t\t\t\t\"PC11\", \"PC12\", \"PC13\", \"PC14\",\n" @@ -44,70 +31,70 @@ "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_cs0_pins_a: nand_cs@0 {\n" + "+\t\t\tnand_cs0_pins_a: nand_cs at 0 {\n" "+\t\t\t\tallwinner,pins = \"PC4\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_cs1_pins_a: nand_cs@1 {\n" + "+\t\t\tnand_cs1_pins_a: nand_cs at 1 {\n" "+\t\t\t\tallwinner,pins = \"PC3\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_cs2_pins_a: nand_cs@2 {\n" + "+\t\t\tnand_cs2_pins_a: nand_cs at 2 {\n" "+\t\t\t\tallwinner,pins = \"PC17\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_cs3_pins_a: nand_cs@3 {\n" + "+\t\t\tnand_cs3_pins_a: nand_cs at 3 {\n" "+\t\t\t\tallwinner,pins = \"PC18\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_cs4_pins_a: nand_cs@4 {\n" + "+\t\t\tnand_cs4_pins_a: nand_cs at 4 {\n" "+\t\t\t\tallwinner,pins = \"PC19\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_cs5_pins_a: nand_cs@5 {\n" + "+\t\t\tnand_cs5_pins_a: nand_cs at 5 {\n" "+\t\t\t\tallwinner,pins = \"PC20\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_cs6_pins_a: nand_cs@6 {\n" + "+\t\t\tnand_cs6_pins_a: nand_cs at 6 {\n" "+\t\t\t\tallwinner,pins = \"PC21\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_cs7_pins_a: nand_cs@7 {\n" + "+\t\t\tnand_cs7_pins_a: nand_cs at 7 {\n" "+\t\t\t\tallwinner,pins = \"PC22\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_rb0_pins_a: nand_rb@0 {\n" + "+\t\t\tnand_rb0_pins_a: nand_rb at 0 {\n" "+\t\t\t\tallwinner,pins = \"PC6\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" "+\t\t\t\tallwinner,pull = <0>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tnand_rb1_pins_a: nand_rb@1 {\n" + "+\t\t\tnand_rb1_pins_a: nand_rb at 1 {\n" "+\t\t\t\tallwinner,pins = \"PC7\";\n" "+\t\t\t\tallwinner,function = \"nand0\";\n" "+\t\t\t\tallwinner,drive = <0>;\n" @@ -115,8 +102,8 @@ "+\t\t\t};\n" " \t\t};\n" " \n" - " \t\ttimer@01c20c00 {\n" + " \t\ttimer at 01c20c00 {\n" "-- \n" 1.7.9.5 -906a72fa5c6cc930618688e7f3ee8831c1cc6cd62daf0c845bab605f340946b3 +0b7984ea16c208dea4b7b917dac2cde1221476bf77e08ebaa5a4fbbca87c4953
diff --git a/a/1.txt b/N2/1.txt index ec8e332..a50d8ef 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,6 +1,6 @@ Define the NAND controller pin configs. -Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com> +Signed-off-by: Boris BREZILLON <b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- arch/arm/boot/dts/sun7i-a20.dtsi | 80 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/a/content_digest b/N2/content_digest index 19fb1ee..d13b679 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,26 +1,27 @@ "ref\01394647664-8258-1-git-send-email-b.brezillon.dev@gmail.com\0" - "From\0Boris BREZILLON <b.brezillon.dev@gmail.com>\0" + "ref\01394647664-8258-1-git-send-email-b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" + "From\0Boris BREZILLON <b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" "Subject\0[PATCH v3 8/9] ARM: dt/sunxi: add A20 NAND controller pin definitions\0" "Date\0Wed, 12 Mar 2014 19:07:43 +0100\0" - "To\0Maxime Ripard <maxime.ripard@free-electrons.com>" - Rob Herring <robherring2@gmail.com> - David Woodhouse <dwmw2@infradead.org> - Grant Likely <grant.likely@linaro.org> - Brian Norris <computersforpeace@gmail.com> - Jason Gunthorpe <jgunthorpe@obsidianresearch.com> - " Arnd Bergmann <arnd@arndb.de>\0" - "Cc\0devicetree@vger.kernel.org" - Boris BREZILLON <b.brezillon.dev@gmail.com> - linux-doc@vger.kernel.org - dev@linux-sunxi.org - linux-kernel@vger.kernel.org - linux-mtd@lists.infradead.org - " linux-arm-kernel@lists.infradead.org\0" + "To\0Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>" + Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org> + Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + Jason Gunthorpe <jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org> + " Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>\0" + "Cc\0Boris BREZILLON <b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>" + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + " dev-3kdeTeqwOZ9EV1b7eY7vFQ@public.gmane.org\0" "\00:1\0" "b\0" "Define the NAND controller pin configs.\n" "\n" - "Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com>\n" + "Signed-off-by: Boris BREZILLON <b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" "---\n" " arch/arm/boot/dts/sun7i-a20.dtsi | 80 ++++++++++++++++++++++++++++++++++++++\n" " 1 file changed, 80 insertions(+)\n" @@ -119,4 +120,4 @@ "-- \n" 1.7.9.5 -906a72fa5c6cc930618688e7f3ee8831c1cc6cd62daf0c845bab605f340946b3 +b5309344710d86c3d1cdcba97cdae302c8b62acce23b41f7ebf5a9ef91e72812
diff --git a/a/content_digest b/N3/content_digest index 19fb1ee..1b54b2f 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -9,13 +9,13 @@ Brian Norris <computersforpeace@gmail.com> Jason Gunthorpe <jgunthorpe@obsidianresearch.com> " Arnd Bergmann <arnd@arndb.de>\0" - "Cc\0devicetree@vger.kernel.org" - Boris BREZILLON <b.brezillon.dev@gmail.com> + "Cc\0Boris BREZILLON <b.brezillon.dev@gmail.com>" + devicetree@vger.kernel.org linux-doc@vger.kernel.org - dev@linux-sunxi.org linux-kernel@vger.kernel.org + linux-arm-kernel@lists.infradead.org linux-mtd@lists.infradead.org - " linux-arm-kernel@lists.infradead.org\0" + " dev@linux-sunxi.org\0" "\00:1\0" "b\0" "Define the NAND controller pin configs.\n" @@ -119,4 +119,4 @@ "-- \n" 1.7.9.5 -906a72fa5c6cc930618688e7f3ee8831c1cc6cd62daf0c845bab605f340946b3 +3d7774ed056834bd7508855dc6da3d1f24ee835bfd4c4f0db7b4710f71bc681d
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