From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: [PATCH 07/12] drm/i915: Add thread stall DOP clock gating workaround on Broadwell. Date: Fri, 21 Mar 2014 11:48:16 -0700 Message-ID: <1395427701-13434-8-git-send-email-benjamin.widawsky@linux.intel.com> References: <1395427701-13434-1-git-send-email-benjamin.widawsky@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <1395427701-13434-1-git-send-email-benjamin.widawsky@linux.intel.com> Sender: stable-owner@vger.kernel.org To: Intel GFX Cc: Kenneth Graunke , stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org =46rom: Kenneth Graunke Ben and I believe this will be necessary on production hardware. Signed-off-by: Kenneth Graunke [danvet: Shuffle lines to group all ROW_CHICKEN writes and add a cautious comment that this might not be needed on production hw.] Reviewed-by: Ville Syrj=C3=A4l=C3=A4 Reviewed-by: Ben Widawsky Signed-off-by: Daniel Vetter [BDW 3.14 backport] Cc: stable@vger.kernel.org Signed-off-by: Ben Widawsky Conflicts: drivers/gpu/drm/i915/intel_pm.c --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i91= 5_reg.h index cb9ff13..d9b2292 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5014,6 +5014,7 @@ =20 #define GEN8_ROW_CHICKEN 0xe4f0 #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8) +#define STALL_DOP_GATING_DISABLE (1<<5) =20 #define GEN7_ROW_CHICKEN2 0xe4f4 #define GEN7_ROW_CHICKEN2_GT2 0xf4f4 diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/int= el_pm.c index a7e5669..2b82a6b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4713,9 +4713,12 @@ static void gen8_init_clock_gating(struct drm_de= vice *dev) =20 WARN(!i915_preliminary_hw_support, "GEN8_CENTROID_PIXEL_OPT_DIS not be needed for production\n"); + /* WaDisablePartialInstShootdown:bdw */ + /* WaDisableThreadStallDopClockGating:bdw */ I915_WRITE(GEN8_ROW_CHICKEN, - _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE)); + _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE | + STALL_DOP_GATING_DISABLE)); =20 I915_WRITE(HALF_SLICE_CHICKEN3, _MASKED_BIT_ENABLE(GEN8_CENTROID_PIXEL_OPT_DIS)); --=20 1.9.1