From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 04/19] drm/i915: add GEN5_IRQ_FINI Date: Tue, 1 Apr 2014 15:37:12 -0300 Message-ID: <1396377447-2177-5-git-send-email-przanoni@gmail.com> References: <1396377447-2177-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-yk0-f177.google.com (mail-yk0-f177.google.com [209.85.160.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 63F2C6E7F3 for ; Tue, 1 Apr 2014 11:37:41 -0700 (PDT) Received: by mail-yk0-f177.google.com with SMTP id q200so7813942ykb.8 for ; Tue, 01 Apr 2014 11:37:41 -0700 (PDT) In-Reply-To: <1396377447-2177-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni Same as the _INIT macro: the goal is to reuse the GEN8 macros, but there are still some slight differences. v2: - Rebase. Reviewed-by: Ben Widawsky Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index bc7e230..26bfe1b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -101,6 +101,12 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */ POSTING_READ(type##IIR); \ } while (0) +#define GEN5_IRQ_FINI(type) do { \ + I915_WRITE(type##IMR, 0xffffffff); \ + I915_WRITE(type##IER, 0); \ + I915_WRITE(type##IIR, I915_READ(type##IIR)); \ +} while (0) + /* For display hotplug interrupt */ static void ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask) @@ -3353,22 +3359,16 @@ static void ironlake_irq_uninstall(struct drm_device *dev) I915_WRITE(HWSTAM, 0xffffffff); - I915_WRITE(DEIMR, 0xffffffff); - I915_WRITE(DEIER, 0x0); - I915_WRITE(DEIIR, I915_READ(DEIIR)); + GEN5_IRQ_FINI(DE); if (IS_GEN7(dev)) I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT)); - I915_WRITE(GTIMR, 0xffffffff); - I915_WRITE(GTIER, 0x0); - I915_WRITE(GTIIR, I915_READ(GTIIR)); + GEN5_IRQ_FINI(GT); if (HAS_PCH_NOP(dev)) return; - I915_WRITE(SDEIMR, 0xffffffff); - I915_WRITE(SDEIER, 0x0); - I915_WRITE(SDEIIR, I915_READ(SDEIIR)); + GEN5_IRQ_FINI(SDE); if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev)) I915_WRITE(SERR_INT, I915_READ(SERR_INT)); } -- 1.8.5.3