diff for duplicates of <1396972276-11549-1-git-send-email-galak@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index 65ec496..8c01f9c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ Add basic IPQ8064 SoC include device tree and support for basic booting on the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in sorted order. -Signed-off-by: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> +Signed-off-by: Kumar Gala <galak@codeaurora.org> --- v2: * created a v1.0 ipq8064.dtsi to handle differences in Si rev in future @@ -53,7 +53,7 @@ index 0000000..5e6f456 + compatible = "qcom,ipq8064-db149", "qcom,ipq8064"; + + soc { -+ serial@16340000 { ++ serial at 16340000 { + status = "ok"; + }; + }; @@ -87,7 +87,7 @@ index 0000000..8ca3b51 + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + -+ cpu@0 { ++ cpu at 0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; @@ -95,7 +95,7 @@ index 0000000..8ca3b51 + qcom,saw = <&saw0>; + }; + -+ cpu@1 { ++ cpu at 1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; @@ -121,7 +121,7 @@ index 0000000..8ca3b51 + ranges; + compatible = "simple-bus"; + -+ intc: interrupt-controller@2000000 { ++ intc: interrupt-controller at 2000000 { + compatible = "qcom,msm-qgic2"; + interrupt-controller; + #interrupt-cells = <3>; @@ -129,7 +129,7 @@ index 0000000..8ca3b51 + < 0x02002000 0x1000 >; + }; + -+ timer@200a000 { ++ timer at 200a000 { + compatible = "qcom,kpss-timer", "qcom,msm-timer"; + interrupts = <1 1 0x301>, + <1 2 0x301>, @@ -140,29 +140,29 @@ index 0000000..8ca3b51 + cpu-offset = <0x80000>; + }; + -+ acc0: clock-controller@2088000 { ++ acc0: clock-controller at 2088000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + }; + -+ acc1: clock-controller@2098000 { ++ acc1: clock-controller at 2098000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + }; + -+ saw0: regulator@2089000 { ++ saw0: regulator at 2089000 { + compatible = "qcom,saw2"; + reg = <0x02089000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + -+ saw1: regulator@2099000 { ++ saw1: regulator at 2099000 { + compatible = "qcom,saw2"; + reg = <0x02099000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + -+ serial@12490000 { ++ serial at 12490000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x12490000 0x1000>, + <0x12480000 0x1000>; @@ -172,7 +172,7 @@ index 0000000..8ca3b51 + status = "disabled"; + }; + -+ serial@16340000 { ++ serial at 16340000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16340000 0x1000>, + <0x16300000 0x1000>; @@ -182,13 +182,13 @@ index 0000000..8ca3b51 + status = "disabled"; + }; + -+ qcom,ssbi@500000 { ++ qcom,ssbi at 500000 { + compatible = "qcom,ssbi"; + reg = <0x00500000 0x1000>; + qcom,controller-type = "pmic-arbiter"; + }; + -+ gcc: clock-controller@900000 { ++ gcc: clock-controller at 900000 { + compatible = "qcom,gcc-ipq8064"; + reg = <0x00900000 0x4000>; + #clock-cells = <1>; @@ -216,8 +216,3 @@ index bae617e..cb3c07c 100644 -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation - --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 7916a0c..c189a89 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,24 +1,14 @@ - "From\0Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\0" + "From\0galak@codeaurora.org (Kumar Gala)\0" "Subject\0[PATCH v2] ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees\0" "Date\0Tue, 8 Apr 2014 10:51:16 -0500\0" - "To\0Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>" - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - " David Brown <davidb-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\0" - "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Add basic IPQ8064 SoC include device tree and support for basic booting on\n" "the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in\n" "sorted order.\n" "\n" - "Signed-off-by: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\n" + "Signed-off-by: Kumar Gala <galak@codeaurora.org>\n" "---\n" "v2:\n" "* created a v1.0 ipq8064.dtsi to handle differences in Si rev in future\n" @@ -69,7 +59,7 @@ "+\tcompatible = \"qcom,ipq8064-db149\", \"qcom,ipq8064\";\n" "+\n" "+\tsoc {\n" - "+\t\tserial@16340000 {\n" + "+\t\tserial at 16340000 {\n" "+\t\t\tstatus = \"ok\";\n" "+\t\t};\n" "+\t};\n" @@ -103,7 +93,7 @@ "+\t\tcompatible = \"qcom,krait\";\n" "+\t\tenable-method = \"qcom,kpss-acc-v1\";\n" "+\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <0>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -111,7 +101,7 @@ "+\t\t\tqcom,saw = <&saw0>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@1 {\n" + "+\t\tcpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\treg = <1>;\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -137,7 +127,7 @@ "+\t\tranges;\n" "+\t\tcompatible = \"simple-bus\";\n" "+\n" - "+\t\tintc: interrupt-controller@2000000 {\n" + "+\t\tintc: interrupt-controller at 2000000 {\n" "+\t\t\tcompatible = \"qcom,msm-qgic2\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\t#interrupt-cells = <3>;\n" @@ -145,7 +135,7 @@ "+\t\t\t < 0x02002000 0x1000 >;\n" "+\t\t};\n" "+\n" - "+\t\ttimer@200a000 {\n" + "+\t\ttimer at 200a000 {\n" "+\t\t\tcompatible = \"qcom,kpss-timer\", \"qcom,msm-timer\";\n" "+\t\t\tinterrupts = <1 1 0x301>,\n" "+\t\t\t\t <1 2 0x301>,\n" @@ -156,29 +146,29 @@ "+\t\t\tcpu-offset = <0x80000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc0: clock-controller@2088000 {\n" + "+\t\tacc0: clock-controller at 2088000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\t\treg = <0x02088000 0x1000>, <0x02008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc1: clock-controller@2098000 {\n" + "+\t\tacc1: clock-controller at 2098000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\t\treg = <0x02098000 0x1000>, <0x02008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tsaw0: regulator@2089000 {\n" + "+\t\tsaw0: regulator at 2089000 {\n" "+\t\t\tcompatible = \"qcom,saw2\";\n" "+\t\t\treg = <0x02089000 0x1000>, <0x02009000 0x1000>;\n" "+\t\t\tregulator;\n" "+\t\t};\n" "+\n" - "+\t\tsaw1: regulator@2099000 {\n" + "+\t\tsaw1: regulator at 2099000 {\n" "+\t\t\tcompatible = \"qcom,saw2\";\n" "+\t\t\treg = <0x02099000 0x1000>, <0x02009000 0x1000>;\n" "+\t\t\tregulator;\n" "+\t\t};\n" "+\n" - "+\t\tserial@12490000 {\n" + "+\t\tserial at 12490000 {\n" "+\t\t\tcompatible = \"qcom,msm-uartdm-v1.3\", \"qcom,msm-uartdm\";\n" "+\t\t\treg = <0x12490000 0x1000>,\n" "+\t\t\t <0x12480000 0x1000>;\n" @@ -188,7 +178,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tserial@16340000 {\n" + "+\t\tserial at 16340000 {\n" "+\t\t\tcompatible = \"qcom,msm-uartdm-v1.3\", \"qcom,msm-uartdm\";\n" "+\t\t\treg = <0x16340000 0x1000>,\n" "+\t\t\t <0x16300000 0x1000>;\n" @@ -198,13 +188,13 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tqcom,ssbi@500000 {\n" + "+\t\tqcom,ssbi at 500000 {\n" "+\t\t\tcompatible = \"qcom,ssbi\";\n" "+\t\t\treg = <0x00500000 0x1000>;\n" "+\t\t\tqcom,controller-type = \"pmic-arbiter\";\n" "+\t\t};\n" "+\n" - "+\t\tgcc: clock-controller@900000 {\n" + "+\t\tgcc: clock-controller at 900000 {\n" "+\t\t\tcompatible = \"qcom,gcc-ipq8064\";\n" "+\t\t\treg = <0x00900000 0x4000>;\n" "+\t\t\t#clock-cells = <1>;\n" @@ -231,11 +221,6 @@ " \n" "-- \n" "The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\n" - "hosted by The Linux Foundation\n" - "\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + hosted by The Linux Foundation -a5f44321d7d24fecd79bb85f05ba5f0863b490ecc02c42a2016bc77f5e70cf3b +6615c74396354f9b220048f9a2beba7d4d6c32752c5f1bee2ee855aad91ef85e
diff --git a/a/1.txt b/N2/1.txt index 65ec496..54445ab 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -2,7 +2,7 @@ Add basic IPQ8064 SoC include device tree and support for basic booting on the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in sorted order. -Signed-off-by: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> +Signed-off-by: Kumar Gala <galak@codeaurora.org> --- v2: * created a v1.0 ipq8064.dtsi to handle differences in Si rev in future @@ -216,8 +216,3 @@ index bae617e..cb3c07c 100644 -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation - --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index 7916a0c..d96ebb9 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,24 +1,24 @@ - "From\0Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\0" + "From\0Kumar Gala <galak@codeaurora.org>\0" "Subject\0[PATCH v2] ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees\0" "Date\0Tue, 8 Apr 2014 10:51:16 -0500\0" - "To\0Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>" - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - " David Brown <davidb-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\0" - "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0Rob Herring <robh+dt@kernel.org>" + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + Russell King <linux@arm.linux.org.uk> + " David Brown <davidb@codeaurora.org>\0" + "Cc\0devicetree@vger.kernel.org" + linux-kernel@vger.kernel.org + linux-arm-kernel@lists.infradead.org + " linux-arm-msm@vger.kernel.org\0" "\00:1\0" "b\0" "Add basic IPQ8064 SoC include device tree and support for basic booting on\n" "the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in\n" "sorted order.\n" "\n" - "Signed-off-by: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\n" + "Signed-off-by: Kumar Gala <galak@codeaurora.org>\n" "---\n" "v2:\n" "* created a v1.0 ipq8064.dtsi to handle differences in Si rev in future\n" @@ -231,11 +231,6 @@ " \n" "-- \n" "The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\n" - "hosted by The Linux Foundation\n" - "\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + hosted by The Linux Foundation -a5f44321d7d24fecd79bb85f05ba5f0863b490ecc02c42a2016bc77f5e70cf3b +5ed6f0ce51ccc02e41f72000237fe8a6a6b12b0060bb7b453c2b923e6d5ca894
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