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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49987b2e6b6sm32873485e9.3.2026.08.14.01.13.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 14 Aug 2026 01:13:22 -0700 (PDT) Message-ID: <13b0aca6-d1b9-4e76-88ce-530e0bc4db20@oss.qualcomm.com> Date: Fri, 14 Aug 2026 10:13:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] target/arm: Restrict arm_do_plugin_vcpu_discon_cb() to TCG Content-Language: en-US To: qemu-devel@nongnu.org Cc: =?UTF-8?Q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Peter Maydell , Pierrick Bouvier , qemu-ppc References: <20260814080507.23196-1-philmd@oss.qualcomm.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20260814080507.23196-1-philmd@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=Ovh/DS/t c=1 sm=1 tr=0 ts=6a7ece23 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=yRaO2QFb4kDYuS9kHpcA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODE0MDA2MiBTYWx0ZWRfX1VsQ+uYSxV7k W0ATtns5S7FhPXCjdjBt0Jc28/u/3I/jLxJVCfcugvWntu/RsD8ZACOVw2f9oCyTMWytdo9N3pt OEct2pjx8yG9fdtWGmjzYNEIZSfMdeE= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE0MDA2MiBTYWx0ZWRfX5/AwMz77h5MB dE1bLEk6HyXGSMVwgJSY3jqW0HgFrecUaCtmj8S9jJURUVAWnUBv4DWzLmgJu2KxA5qAxrpEwxt bM5gOrGjFtIJ/p7PucMi1B1AXPFYe+8gqoEn3XhSgHExFJR97AVYVVRbPyTlNsgESAtvQUsNzTV 1CGukXAAkJvMHXgqxjr6zMS1a5+6uf8DIneAxR0BDtTYuatFNCtMgfEpCfQ8rvfWBIr7o8QEpvk j07EA2eoyUZxvdaW4cyPjxBgM8RG2xuVZ4L7PTpihhzuop80nILp4dmvmNAqXHSmblypa4E36g8 p8E68zKz70QjQP524TCgDOPxs6GXJhB7aAoqcXqXUEHW04eX0s1zG/RaGi6rrZGU7RyHpn51jMI tfGbY81qBQ4ZAnWD8YPt6teeY5FOy3zSp+Jt57lJv7AuDc8BFoiMUu1pRTAWcjkuL7MTXViIym4 2jCM8eSfaPwKHArGZlg== X-Proofpoint-ORIG-GUID: JlhWAyh6OKqadlQ5VJOJZhxJWshts-DX X-Proofpoint-GUID: JlhWAyh6OKqadlQ5VJOJZhxJWshts-DX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-14_03,2026-08-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608140062 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On 14/8/26 10:05, Philippe Mathieu-Daudé wrote: > So far TCG plugins can only be used when TCG is available. > Move the arm_do_plugin_vcpu_discon_cb() call within the > 'if tcg_enabled' block and wrap the definition with #ifdef'ry. > > Signed-off-by: Philippe Mathieu-Daudé > --- BTW luckily, except PPC, all other targets with HW accelerator support already have this restricted to TCG (X86, LoongArch, RISCV, S390x). Since I'm only testing hybrid acceleration on ARM I don't have the need to do the equivalent cleanup on PPC. > target/arm/helper.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index af45234ad2a..adae2b2b8e5 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -8915,6 +8915,7 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode, > } > } > > +#ifdef CONFIG_TCG > void arm_do_plugin_vcpu_discon_cb(CPUState *cs, uint64_t from) > { > switch (cs->exception_index) { > @@ -8932,6 +8933,7 @@ void arm_do_plugin_vcpu_discon_cb(CPUState *cs, uint64_t from) > qemu_plugin_vcpu_exception_cb(cs, from); > } > } > +#endif > > static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs) > { > @@ -9677,9 +9679,9 @@ void arm_cpu_do_interrupt(CPUState *cs) > > if (tcg_enabled()) { > cpu_set_interrupt(cs, CPU_INTERRUPT_EXITTB); > - } > > - arm_do_plugin_vcpu_discon_cb(cs, last_pc); > + arm_do_plugin_vcpu_discon_cb(cs, last_pc); > + } > } > #endif /* !CONFIG_USER_ONLY */ >