From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Vadim Pasternak <vadimp@nvidia.com>
Cc: Hans de Goede <hdegoede@redhat.com>,
michaelsh@nvidia.com, crajank@nvidia.com, fradensky@nvidia.com,
oleksandrs@nvidia.com, platform-driver-x86@vger.kernel.org
Subject: Re: [PATCH v5 05/12] platform/mellanox: mlxreg-hotplug: Add support for new flavor of capability registers
Date: Mon, 3 Feb 2025 15:47:08 +0200 (EET) [thread overview]
Message-ID: <13c4d945-a9e3-05ec-a805-573980505f3f@linux.intel.com> (raw)
In-Reply-To: <20250124172632.22437-6-vadimp@nvidia.com>
On Fri, 24 Jan 2025, Vadim Pasternak wrote:
> Hotplug platform data is common across the various systems, while
> hotplug driver should be able to configure only the instances relevant
> to specific system.
>
> For example, platform hoptplug data might contain descriptions for fan1,
> fan2, ..., fan{n}, while some systems equipped with all 'n' fans,
> others with less.
> Same for power units, power controllers, ASICs and so on.
>
> For detection of the real number of equipped devices capability
> registers are used.
> These registers used to indicate presence of hotplug devices through
> the bitmap.
Hi,
Don't leave non-full lines in middle of a paragraph.
> For some new big modular systems, these registers will provide presence
> by counters.
>
> Use slot parameter to determine whether capability register contains
> bitmask or counter.
>
> Some 'capability' registers can be shared between different resources.
> Use fields 'capability_bit' and 'capability_mask' for getting only
> relevant capability bits.
>
> Reviewed-by: Felix Radensky <fradensky@nvidia.com>
> Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
> ---
> v2->v3
> Comments pointed out by Ilpo:
> - Change rol32() to shift left.
> ---
> drivers/platform/mellanox/mlxreg-hotplug.c | 22 ++++++++++++++++++++--
> 1 file changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/platform/mellanox/mlxreg-hotplug.c b/drivers/platform/mellanox/mlxreg-hotplug.c
> index 0ce9fff1f7d4..c525b8754d48 100644
> --- a/drivers/platform/mellanox/mlxreg-hotplug.c
> +++ b/drivers/platform/mellanox/mlxreg-hotplug.c
> @@ -274,6 +274,12 @@ static int mlxreg_hotplug_attr_init(struct mlxreg_hotplug_priv_data *priv)
> if (ret)
> return ret;
>
> + if (!regval)
> + continue;
> +
> + /* Remove non-relevant bits. */
> + if (item->capability_mask)
> + regval = (regval & item->capability_mask) << item->capability_bit;
What's in regval at this point? What it was before this patch?
> item->mask = GENMASK((regval & item->mask) - 1, 0);
I'm sorry but that comment didn't really help me understand what's going
on here with the double field mask generation.
Is the code correct both before the addition of the extra step and after
it? Because I cannot wrap my head around what this code attempts to do and
how could it be correct both pre and post this change.
FYI, I've taken patches 1-3 of this series into review-ilpo-next as they
seemed trivial changes.
--
i.
> }
>
> @@ -294,7 +300,19 @@ static int mlxreg_hotplug_attr_init(struct mlxreg_hotplug_priv_data *priv)
> if (ret)
> return ret;
>
> - if (!(regval & data->bit)) {
> + /*
> + * In case slot field is provided, capability
> + * register contains counter, otherwise bitmask.
> + * Skip non-relevant entries if slot set and
> + * exceeds counter. Othewise validate entry by
> + * matching bitmask.
> + */
> + if (data->capability_mask)
> + regval = (regval & item->capability_mask) <<
> + item->capability_bit;
> + if (data->slot > regval) {
> + break;
> + } else if (!(regval & data->bit) && !data->slot) {
> data++;
> continue;
> }
> @@ -611,7 +629,7 @@ static int mlxreg_hotplug_set_irq(struct mlxreg_hotplug_priv_data *priv)
> if (ret)
> goto out;
>
> - if (!(regval & data->bit))
> + if (!(regval & data->bit) && !data->slot)
> item->mask &= ~BIT(j);
> }
> }
>
next prev parent reply other threads:[~2025-02-03 13:47 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-24 17:26 [PATCH v5 00/12] platform/mellanox: Add support for new systems, amendments, relocate mlx-platform module Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 01/12] mellanox: Relocate mlx-platform driver Vadim Pasternak
2025-02-04 14:33 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 02/12] platform: mellanox: mlx-platform: Cosmetic changes Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 03/12] platform: mellanox: mlx-platform: Change register name Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 04/12] platform_data/mlxreg: Add capability bit and mask fields Vadim Pasternak
2025-02-03 13:50 ` Ilpo Järvinen
2025-02-10 20:30 ` Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 05/12] platform/mellanox: mlxreg-hotplug: Add support for new flavor of capability registers Vadim Pasternak
2025-02-03 13:47 ` Ilpo Järvinen [this message]
2025-02-10 20:30 ` Vadim Pasternak
2025-02-11 14:48 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 06/12] platform/mellanox: Rename field to improve code readability Vadim Pasternak
2025-02-03 13:52 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 07/12] platform/mellanox: mlxreg-dpu: Add initial support for Nvidia DPU Vadim Pasternak
2025-02-03 14:20 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 08/12] platform: mellanox: Introduce support of Nvidia smart switch Vadim Pasternak
2025-02-03 14:32 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 09/12] platform: mellanox: Cosmetic changes to improve code style Vadim Pasternak
2025-02-03 14:35 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 10/12] platform: mellanox: mlx-platform: Add support for new Nvidia system Vadim Pasternak
2025-02-03 14:38 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 11/12] platform: mellanox: nvsw-sn2200: Add support for new system flavour Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 12/12] Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces Vadim Pasternak
2025-02-03 14:40 ` Ilpo Järvinen
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