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From: Jiang Liu <jiang.liu@linux.intel.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Randy Dunlap <rdunlap@infradead.org>,
	Yinghai Lu <yinghai@kernel.org>,
	x86@kernel.org, Jiri Kosina <trivial@kernel.org>,
	Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Tony Luck <tony.luck@intel.com>, Joerg Roedel <joro@8bytes.org>,
	Paul Gortmaker <paul.gortmaker@windriver.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-acpi@vger.kernel.org, sfi-devel@simplefirmware.org,
	Ingo Molnar <mingo@kernel.org>
Subject: [RFC Patch Part1 V1 09/30] x86, irq, trivial: minor improvements of IRQ related code
Date: Fri, 16 May 2014 16:05:29 +0800	[thread overview]
Message-ID: <1400227550-5935-10-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1400227550-5935-1-git-send-email-jiang.liu@linux.intel.com>

1) Kill unused MAX_HARDIRQS_PER_CPU.
2) Improve function prototype declararions.
3) simple typo fix, change "gsit" to "gsi".
4) use macro VECTOR_UNDEFINED instead of hard-coded -1.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
 arch/x86/include/asm/hardirq.h |    3 ---
 arch/x86/include/asm/io_apic.h |   16 +++++++---------
 arch/x86/kernel/apic/io_apic.c |   10 +++++-----
 3 files changed, 12 insertions(+), 17 deletions(-)

diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 230853da4ec0..0f5fb6b6567e 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -40,9 +40,6 @@ typedef struct {
 
 DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
 
-/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
-#define MAX_HARDIRQS_PER_CPU NR_VECTORS
-
 #define __ARCH_IRQ_STAT
 
 #define inc_irq_stat(member)	this_cpu_inc(irq_stat.member)
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 677e599c275e..8f472daea221 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -144,22 +144,20 @@ struct io_apic_irq_attr;
 struct irq_cfg;
 extern int io_apic_set_pci_routing(struct device *dev, int irq,
 		 struct io_apic_irq_attr *irq_attr);
-void setup_IO_APIC_irq_extra(u32 gsi);
+extern void setup_IO_APIC_irq_extra(u32 gsi);
 extern void ioapic_insert_resources(void);
 
 extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
 				     unsigned int, int,
 				     struct io_apic_irq_attr *);
-extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
-				     unsigned int, int,
-				     struct io_apic_irq_attr *);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
 extern void native_compose_msi_msg(struct pci_dev *pdev,
 				   unsigned int irq, unsigned int dest,
 				   struct msi_msg *msg, u8 hpet_id);
 extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
-int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
+extern int io_apic_setup_irq_pin_once(unsigned int irq, int node,
+				      struct io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
 extern void mask_ioapic_entries(void);
@@ -174,11 +172,11 @@ struct mp_ioapic_gsi{
 	u32 gsi_base;
 	u32 gsi_end;
 };
-extern struct mp_ioapic_gsi  mp_gsi_routing[];
 extern u32 gsi_top;
-int mp_find_ioapic(u32 gsi);
-int mp_find_ioapic_pin(int ioapic, u32 gsi);
-void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
+
+extern int mp_find_ioapic(u32 gsi);
+extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
+extern void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
 extern void __init pre_init_apic_IRQ0(void);
 
 extern void mp_save_irq(struct mpc_intsrc *m);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 992060e09897..1041b227726a 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1025,7 +1025,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
 				break;
 
 		if (!test_bit(lbus, mp_bus_not_pci) &&
-		    !mp_irqs[i].irqtype &&
+		    mp_irqs[i].irqtype == mp_INT &&
 		    (bus == lbus) &&
 		    (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
 			int irq = pin_2_irq(i, ioapic_idx, mp_irqs[i].dstirq);
@@ -1374,7 +1374,7 @@ static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
 
 		irq = pin_2_irq(idx, ioapic_idx, pin);
 
-		if ((ioapic_idx > 0) && (irq > 16))
+		if ((ioapic_idx > 0) && (irq > NR_IRQS_LEGACY))
 			continue;
 
 		/*
@@ -1403,7 +1403,7 @@ static void __init setup_IO_APIC_irqs(void)
 }
 
 /*
- * for the gsit that is not in first ioapic
+ * for the gsi that is not in first ioapic
  * but could not use acpi_register_gsi()
  * like some special sci in IBM x3330
  */
@@ -2240,7 +2240,7 @@ asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)
 			apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR);
 			goto unlock;
 		}
-		__this_cpu_write(vector_irq[vector], -1);
+		__this_cpu_write(vector_irq[vector], VECTOR_UNDEFINED);
 unlock:
 		raw_spin_unlock(&desc->lock);
 	}
@@ -3624,7 +3624,7 @@ void __init setup_ioapic_dest(void)
 			continue;
 		irq = pin_2_irq(irq_entry, ioapic, pin);
 
-		if ((ioapic > 0) && (irq > 16))
+		if ((ioapic > 0) && (irq > NR_IRQS_LEGACY))
 			continue;
 
 		idata = irq_get_irq_data(irq);
-- 
1.7.10.4

  parent reply	other threads:[~2014-05-16  8:05 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-16  8:05 [RFC Patch Part1 V1 00/30] use irqdomain to dynamically allocate IRQ for IOAPIC pin Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 01/30] genirq, trivial: improve documentation to match current implementation Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 02/30] x86, mpparse: use pr_lvl() helper utilities to replace printk(KERN_LVL) Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 03/30] x86, mpparse: simplify arch/x86/include/asm/mpspec.h Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 04/30] x86, PCI, ACPI: use kmalloc_node() to optimize for performance Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 05/30] x86, acpi, irq: kill static function irq_to_gsi() Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 06/30] x86, ACPI, trivial: minor improvements to arch/x86/kernel/acpi/boot.c Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 07/30] x86, ACPI, irq: enhance error handling in function acpi_register_gsi() Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 08/30] x86, ACPI, irq: fix possible eror in GSI to IRQ mapping for legacy IRQ Jiang Liu
2014-05-16  8:05 ` Jiang Liu [this message]
2014-05-16  8:05 ` [RFC Patch Part1 V1 10/30] x86, ioapic: kill unused global variable timer_through_8259 Jiang Liu
     [not found] ` <1400227550-5935-1-git-send-email-jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2014-05-16  8:05   ` [RFC Patch Part1 V1 11/30] x86, ioapic: replace get_nr_irqs_gsi() with arch_dynirq_lower_bound(0) Jiang Liu
2014-05-16  8:05     ` Jiang Liu
2014-05-16  8:05 ` Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 12/30] x86, ioapic: kill static variable nr_irqs_gsi Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 13/30] x86, ioapic: introduce helper utilities to walk ioapics and pins Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 14/30] x86, ioapic: use irq_cfg() instead of irq_get_chip_data() for better readability Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 15/30] x86, irq: update high address field when updating affinity for MSI IRQ Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 16/30] x86, irq: reorganize IO_APIC_get_PCI_irq_vector() to prepare for irqdomain Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 17/30] x86, irq: introduce some helper utilities to improve readability Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 18/30] x86, ACPI, irq: consolidate algorithm of mapping (ioapic, pin) to IRQ number Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 19/30] x86, irq: introduce mechanisms to support dynamically allocate IRQ for IOAPIC Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 20/30] x86, irq: enhance mp_register_ioapic() to support irqdomain Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 21/30] x86, ACPI, irq: provide basic irqdomain support Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 22/30] x86, mpparse, " Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 23/30] x86, devicetree, irq: use common mechanism to support irqdomain Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 24/30] x86, SFI, irq: provide basic irqdomain support Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 25/30] x86, irq: introduce two helper functions to support irqdomain map operation Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 26/30] x86, irq, ACPI: use common irqdomain map interface to program IOAPIC pins Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 27/30] x86, irq, mpparse: " Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 28/30] x86, irq, SFI: " Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 29/30] x86, irq, devicetree: " Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 30/30] x86, irq: clean up unused IOAPIC interface Jiang Liu
2014-05-16 15:01 ` [RFC Patch Part1 V1 00/30] use irqdomain to dynamically allocate IRQ for IOAPIC pin Yinghai Lu
2014-05-18  8:58   ` Jiang Liu
2014-05-16 15:28 ` Thomas Gleixner
2014-05-18  9:36   ` Jiang Liu
2014-05-19 14:04     ` Thomas Gleixner
2014-05-19 23:35       ` Thomas Gleixner

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