diff for duplicates of <1401301574-20102-1-git-send-email-galak@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index 6bfcba8..753b6bf 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -58,10 +58,10 @@ index 0000000..7c2441d + compatible = "qcom,apq8064-ifc6410", "qcom,apq8064"; + + soc { -+ gsbi@16600000 { ++ gsbi at 16600000 { + status = "ok"; + qcom,mode = <GSBI_PROT_I2C_UART>; -+ serial@16640000 { ++ serial at 16640000 { + status = "ok"; + }; + }; @@ -95,7 +95,7 @@ index 0000000..e8a3423 + #address-cells = <1>; + #size-cells = <0>; + -+ cpu@0 { ++ cpu at 0 { + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + device_type = "cpu"; @@ -105,7 +105,7 @@ index 0000000..e8a3423 + qcom,saw = <&saw0>; + }; + -+ cpu@1 { ++ cpu at 1 { + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + device_type = "cpu"; @@ -115,7 +115,7 @@ index 0000000..e8a3423 + qcom,saw = <&saw1>; + }; + -+ cpu@2 { ++ cpu at 2 { + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + device_type = "cpu"; @@ -125,7 +125,7 @@ index 0000000..e8a3423 + qcom,saw = <&saw2>; + }; + -+ cpu@3 { ++ cpu at 3 { + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + device_type = "cpu"; @@ -152,7 +152,7 @@ index 0000000..e8a3423 + ranges; + compatible = "simple-bus"; + -+ intc: interrupt-controller@2000000 { ++ intc: interrupt-controller at 2000000 { + compatible = "qcom,msm-qgic2"; + interrupt-controller; + #interrupt-cells = <3>; @@ -160,7 +160,7 @@ index 0000000..e8a3423 + <0x02002000 0x1000>; + }; + -+ timer@200a000 { ++ timer at 200a000 { + compatible = "qcom,kpss-timer", "qcom,msm-timer"; + interrupts = <1 1 0x301>, + <1 2 0x301>, @@ -171,51 +171,51 @@ index 0000000..e8a3423 + cpu-offset = <0x80000>; + }; + -+ acc0: clock-controller@2088000 { ++ acc0: clock-controller at 2088000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + }; + -+ acc1: clock-controller@2098000 { ++ acc1: clock-controller at 2098000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + }; + -+ acc2: clock-controller@20a8000 { ++ acc2: clock-controller at 20a8000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x020a8000 0x1000>, <0x02008000 0x1000>; + }; + -+ acc3: clock-controller@20b8000 { ++ acc3: clock-controller at 20b8000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x020b8000 0x1000>, <0x02008000 0x1000>; + }; + -+ saw0: regulator@2089000 { ++ saw0: regulator at 2089000 { + compatible = "qcom,saw2"; + reg = <0x02089000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + -+ saw1: regulator@2099000 { ++ saw1: regulator at 2099000 { + compatible = "qcom,saw2"; + reg = <0x02099000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + -+ saw2: regulator@20a9000 { ++ saw2: regulator at 20a9000 { + compatible = "qcom,saw2"; + reg = <0x020a9000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + -+ saw3: regulator@20b9000 { ++ saw3: regulator at 20b9000 { + compatible = "qcom,saw2"; + reg = <0x020b9000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + -+ gsbi7: gsbi@16600000 { ++ gsbi7: gsbi at 16600000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x16300000 0x100>; @@ -225,7 +225,7 @@ index 0000000..e8a3423 + #size-cells = <1>; + ranges; + -+ serial@16640000 { ++ serial at 16640000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16640000 0x1000>, + <0x16600000 0x1000>; @@ -236,13 +236,13 @@ index 0000000..e8a3423 + }; + }; + -+ qcom,ssbi@500000 { ++ qcom,ssbi at 500000 { + compatible = "qcom,ssbi"; + reg = <0x00500000 0x1000>; + qcom,controller-type = "pmic-arbiter"; + }; + -+ gcc: clock-controller@900000 { ++ gcc: clock-controller at 900000 { + compatible = "qcom,gcc-apq8064"; + reg = <0x00900000 0x4000>; + #clock-cells = <1>; diff --git a/a/content_digest b/N1/content_digest index 1e471cd..0a8592f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,17 +1,7 @@ - "From\0Kumar Gala <galak@codeaurora.org>\0" + "From\0galak@codeaurora.org (Kumar Gala)\0" "Subject\0[PATCH v3] ARM: qcom: Add initial APQ8064 SoC and IFC6410 board device trees\0" "Date\0Wed, 28 May 2014 13:26:14 -0500\0" - "To\0Rob Herring <robh+dt@kernel.org>" - Pawel Moll <pawel.moll@arm.com> - Mark Rutland <mark.rutland@arm.com> - Ian Campbell <ijc+devicetree@hellion.org.uk> - Kumar Gala <galak@codeaurora.org> - Russell King <linux@arm.linux.org.uk> - " David Brown <davidb@codeaurora.org>\0" - "Cc\0devicetree@vger.kernel.org" - linux-kernel@vger.kernel.org - linux-arm-kernel@lists.infradead.org - " linux-arm-msm@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Add basic APQ8064 SoC include device tree and support for basic booting on\n" @@ -74,10 +64,10 @@ "+\tcompatible = \"qcom,apq8064-ifc6410\", \"qcom,apq8064\";\n" "+\n" "+\tsoc {\n" - "+\t\tgsbi@16600000 {\n" + "+\t\tgsbi at 16600000 {\n" "+\t\t\tstatus = \"ok\";\n" "+\t\t\tqcom,mode = <GSBI_PROT_I2C_UART>;\n" - "+\t\t\tserial@16640000 {\n" + "+\t\t\tserial at 16640000 {\n" "+\t\t\t\tstatus = \"ok\";\n" "+\t\t\t};\n" "+\t\t};\n" @@ -111,7 +101,7 @@ "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tcompatible = \"qcom,krait\";\n" "+\t\t\tenable-method = \"qcom,kpss-acc-v1\";\n" "+\t\t\tdevice_type = \"cpu\";\n" @@ -121,7 +111,7 @@ "+\t\t\tqcom,saw = <&saw0>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@1 {\n" + "+\t\tcpu at 1 {\n" "+\t\t\tcompatible = \"qcom,krait\";\n" "+\t\t\tenable-method = \"qcom,kpss-acc-v1\";\n" "+\t\t\tdevice_type = \"cpu\";\n" @@ -131,7 +121,7 @@ "+\t\t\tqcom,saw = <&saw1>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@2 {\n" + "+\t\tcpu at 2 {\n" "+\t\t\tcompatible = \"qcom,krait\";\n" "+\t\t\tenable-method = \"qcom,kpss-acc-v1\";\n" "+\t\t\tdevice_type = \"cpu\";\n" @@ -141,7 +131,7 @@ "+\t\t\tqcom,saw = <&saw2>;\n" "+\t\t};\n" "+\n" - "+\t\tcpu@3 {\n" + "+\t\tcpu at 3 {\n" "+\t\t\tcompatible = \"qcom,krait\";\n" "+\t\t\tenable-method = \"qcom,kpss-acc-v1\";\n" "+\t\t\tdevice_type = \"cpu\";\n" @@ -168,7 +158,7 @@ "+\t\tranges;\n" "+\t\tcompatible = \"simple-bus\";\n" "+\n" - "+\t\tintc: interrupt-controller@2000000 {\n" + "+\t\tintc: interrupt-controller at 2000000 {\n" "+\t\t\tcompatible = \"qcom,msm-qgic2\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\t#interrupt-cells = <3>;\n" @@ -176,7 +166,7 @@ "+\t\t\t <0x02002000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\ttimer@200a000 {\n" + "+\t\ttimer at 200a000 {\n" "+\t\t\tcompatible = \"qcom,kpss-timer\", \"qcom,msm-timer\";\n" "+\t\t\tinterrupts = <1 1 0x301>,\n" "+\t\t\t\t <1 2 0x301>,\n" @@ -187,51 +177,51 @@ "+\t\t\tcpu-offset = <0x80000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc0: clock-controller@2088000 {\n" + "+\t\tacc0: clock-controller at 2088000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\t\treg = <0x02088000 0x1000>, <0x02008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc1: clock-controller@2098000 {\n" + "+\t\tacc1: clock-controller at 2098000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\t\treg = <0x02098000 0x1000>, <0x02008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc2: clock-controller@20a8000 {\n" + "+\t\tacc2: clock-controller at 20a8000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\t\treg = <0x020a8000 0x1000>, <0x02008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tacc3: clock-controller@20b8000 {\n" + "+\t\tacc3: clock-controller at 20b8000 {\n" "+\t\t\tcompatible = \"qcom,kpss-acc-v1\";\n" "+\t\t\treg = <0x020b8000 0x1000>, <0x02008000 0x1000>;\n" "+\t\t};\n" "+\n" - "+\t\tsaw0: regulator@2089000 {\n" + "+\t\tsaw0: regulator at 2089000 {\n" "+\t\t\tcompatible = \"qcom,saw2\";\n" "+\t\t\treg = <0x02089000 0x1000>, <0x02009000 0x1000>;\n" "+\t\t\tregulator;\n" "+\t\t};\n" "+\n" - "+\t\tsaw1: regulator@2099000 {\n" + "+\t\tsaw1: regulator at 2099000 {\n" "+\t\t\tcompatible = \"qcom,saw2\";\n" "+\t\t\treg = <0x02099000 0x1000>, <0x02009000 0x1000>;\n" "+\t\t\tregulator;\n" "+\t\t};\n" "+\n" - "+\t\tsaw2: regulator@20a9000 {\n" + "+\t\tsaw2: regulator at 20a9000 {\n" "+\t\t\tcompatible = \"qcom,saw2\";\n" "+\t\t\treg = <0x020a9000 0x1000>, <0x02009000 0x1000>;\n" "+\t\t\tregulator;\n" "+\t\t};\n" "+\n" - "+\t\tsaw3: regulator@20b9000 {\n" + "+\t\tsaw3: regulator at 20b9000 {\n" "+\t\t\tcompatible = \"qcom,saw2\";\n" "+\t\t\treg = <0x020b9000 0x1000>, <0x02009000 0x1000>;\n" "+\t\t\tregulator;\n" "+\t\t};\n" "+\n" - "+\t\tgsbi7: gsbi@16600000 {\n" + "+\t\tgsbi7: gsbi at 16600000 {\n" "+\t\t\tstatus = \"disabled\";\n" "+\t\t\tcompatible = \"qcom,gsbi-v1.0.0\";\n" "+\t\t\treg = <0x16300000 0x100>;\n" @@ -241,7 +231,7 @@ "+\t\t\t#size-cells = <1>;\n" "+\t\t\tranges;\n" "+\n" - "+\t\t\tserial@16640000 {\n" + "+\t\t\tserial at 16640000 {\n" "+\t\t\t\tcompatible = \"qcom,msm-uartdm-v1.3\", \"qcom,msm-uartdm\";\n" "+\t\t\t\treg = <0x16640000 0x1000>,\n" "+\t\t\t\t <0x16600000 0x1000>;\n" @@ -252,13 +242,13 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tqcom,ssbi@500000 {\n" + "+\t\tqcom,ssbi at 500000 {\n" "+\t\t\tcompatible = \"qcom,ssbi\";\n" "+\t\t\treg = <0x00500000 0x1000>;\n" "+\t\t\tqcom,controller-type = \"pmic-arbiter\";\n" "+\t\t};\n" "+\n" - "+\t\tgcc: clock-controller@900000 {\n" + "+\t\tgcc: clock-controller at 900000 {\n" "+\t\t\tcompatible = \"qcom,gcc-apq8064\";\n" "+\t\t\treg = <0x00900000 0x4000>;\n" "+\t\t\t#clock-cells = <1>;\n" @@ -286,4 +276,4 @@ "The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\n" hosted by The Linux Foundation -874933680a1aee7aaeba77dc1527e82bc24fba52a9d82cc6f360a60a931b9432 +ca287c5a9362494eefe409a6c19476ec0fe12b7bd4fc37acaaa2421003bca38c
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