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diff for duplicates of <1401301643-20191-1-git-send-email-galak@codeaurora.org>

diff --git a/a/1.txt b/N1/1.txt
index 5e8fa18..468dab7 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -21,7 +21,7 @@ index a58fb88..8e77ed7 100644
  	compatible = "qcom,msm8960-cdp", "qcom,msm8960";
 +
 +	soc {
-+		serial@16440000 {
++		serial at 16440000 {
 +			status = "ok";
 +		};
 +	};
@@ -37,7 +37,7 @@ index 997b7b9..c38e54c 100644
 -		compatible = "qcom,krait";
 -		enable-method = "qcom,kpss-acc-v1";
  
- 		cpu@0 {
+ 		cpu at 0 {
 +			compatible = "qcom,krait";
 +			enable-method = "qcom,kpss-acc-v1";
  			device_type = "cpu";
@@ -46,7 +46,7 @@ index 997b7b9..c38e54c 100644
 @@ -25,6 +25,8 @@
  		};
  
- 		cpu@1 {
+ 		cpu at 1 {
 +			compatible = "qcom,krait";
 +			enable-method = "qcom,kpss-acc-v1";
  			device_type = "cpu";
@@ -64,7 +64,7 @@ index 997b7b9..c38e54c 100644
  		qcom,no-pc-write;
  	};
  
--	intc: interrupt-controller@2000000 {
+-	intc: interrupt-controller at 2000000 {
 -		compatible = "qcom,msm-qgic2";
 -		interrupt-controller;
 -		#interrupt-cells = <3>;
@@ -77,7 +77,7 @@ index 997b7b9..c38e54c 100644
 +		ranges;
 +		compatible = "simple-bus";
 +
-+		intc: interrupt-controller@2000000 {
++		intc: interrupt-controller at 2000000 {
 +			compatible = "qcom,msm-qgic2";
 +			interrupt-controller;
 +			#interrupt-cells = <3>;
@@ -85,7 +85,7 @@ index 997b7b9..c38e54c 100644
 +			      <0x02002000 0x1000>;
 +		};
  
--	timer@200a000 {
+-	timer at 200a000 {
 -		compatible = "qcom,kpss-timer", "qcom,msm-timer";
 -		interrupts = <1 1 0x301>,
 -			     <1 2 0x301>,
@@ -95,7 +95,7 @@ index 997b7b9..c38e54c 100644
 -				  <32768>;
 -		cpu-offset = <0x80000>;
 -	};
-+		timer@200a000 {
++		timer at 200a000 {
 +			compatible = "qcom,kpss-timer", "qcom,msm-timer";
 +			interrupts = <1 1 0x301>,
 +				     <1 2 0x301>,
@@ -106,7 +106,7 @@ index 997b7b9..c38e54c 100644
 +			cpu-offset = <0x80000>;
 +		};
  
--	msmgpio: gpio@800000 {
+-	msmgpio: gpio at 800000 {
 -		compatible = "qcom,msm-gpio";
 -		gpio-controller;
 -		#gpio-cells = <2>;
@@ -116,7 +116,7 @@ index 997b7b9..c38e54c 100644
 -		#interrupt-cells = <2>;
 -		reg = <0x800000 0x4000>;
 -	};
-+		msmgpio: gpio@800000 {
++		msmgpio: gpio at 800000 {
 +			compatible = "qcom,msm-gpio";
 +			gpio-controller;
 +			#gpio-cells = <2>;
@@ -127,73 +127,73 @@ index 997b7b9..c38e54c 100644
 +			reg = <0x800000 0x4000>;
 +		};
  
--	gcc: clock-controller@900000 {
+-	gcc: clock-controller at 900000 {
 -		compatible = "qcom,gcc-msm8960";
 -		#clock-cells = <1>;
 -		#reset-cells = <1>;
 -		reg = <0x900000 0x4000>;
 -	};
-+		gcc: clock-controller@900000 {
++		gcc: clock-controller at 900000 {
 +			compatible = "qcom,gcc-msm8960";
 +			#clock-cells = <1>;
 +			#reset-cells = <1>;
 +			reg = <0x900000 0x4000>;
 +		};
  
--	clock-controller@4000000 {
+-	clock-controller at 4000000 {
 -		compatible = "qcom,mmcc-msm8960";
 -		reg = <0x4000000 0x1000>;
 -		#clock-cells = <1>;
 -		#reset-cells = <1>;
 -	};
-+		clock-controller@4000000 {
++		clock-controller at 4000000 {
 +			compatible = "qcom,mmcc-msm8960";
 +			reg = <0x4000000 0x1000>;
 +			#clock-cells = <1>;
 +			#reset-cells = <1>;
 +		};
  
--	acc0: clock-controller@2088000 {
+-	acc0: clock-controller at 2088000 {
 -		compatible = "qcom,kpss-acc-v1";
 -		reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
 -	};
-+		acc0: clock-controller@2088000 {
++		acc0: clock-controller at 2088000 {
 +			compatible = "qcom,kpss-acc-v1";
 +			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
 +		};
  
--	acc1: clock-controller@2098000 {
+-	acc1: clock-controller at 2098000 {
 -		compatible = "qcom,kpss-acc-v1";
 -		reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
 -	};
-+		acc1: clock-controller@2098000 {
++		acc1: clock-controller at 2098000 {
 +			compatible = "qcom,kpss-acc-v1";
 +			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
 +		};
  
--	saw0: regulator@2089000 {
+-	saw0: regulator at 2089000 {
 -		compatible = "qcom,saw2";
 -		reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
 -		regulator;
 -	};
-+		saw0: regulator@2089000 {
++		saw0: regulator at 2089000 {
 +			compatible = "qcom,saw2";
 +			reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
 +			regulator;
 +		};
  
--	saw1: regulator@2099000 {
+-	saw1: regulator at 2099000 {
 -		compatible = "qcom,saw2";
 -		reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
 -		regulator;
 -	};
-+		saw1: regulator@2099000 {
++		saw1: regulator at 2099000 {
 +			compatible = "qcom,saw2";
 +			reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
 +			regulator;
 +		};
  
--	serial@16440000 {
+-	serial at 16440000 {
 -		compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 -		reg = <0x16440000 0x1000>,
 -		      <0x16400000 0x1000>;
@@ -201,7 +201,7 @@ index 997b7b9..c38e54c 100644
 -		clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
 -		clock-names = "core", "iface";
 -	};
-+		serial@16440000 {
++		serial at 16440000 {
 +			compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 +			reg = <0x16440000 0x1000>,
 +			      <0x16400000 0x1000>;
@@ -211,23 +211,23 @@ index 997b7b9..c38e54c 100644
 +			status = "disabled";
 +		};
  
--	qcom,ssbi@500000 {
+-	qcom,ssbi at 500000 {
 -		compatible = "qcom,ssbi";
 -		reg = <0x500000 0x1000>;
 -		qcom,controller-type = "pmic-arbiter";
 -	};
-+		qcom,ssbi@500000 {
++		qcom,ssbi at 500000 {
 +			compatible = "qcom,ssbi";
 +			reg = <0x500000 0x1000>;
 +			qcom,controller-type = "pmic-arbiter";
 +		};
  
--	rng@1a500000 {
+-	rng at 1a500000 {
 -		compatible = "qcom,prng";
 -		reg = <0x1a500000 0x200>;
 -		clocks = <&gcc PRNG_CLK>;
 -		clock-names = "core";
-+		rng@1a500000 {
++		rng at 1a500000 {
 +			compatible = "qcom,prng";
 +			reg = <0x1a500000 0x200>;
 +			clocks = <&gcc PRNG_CLK>;
diff --git a/a/content_digest b/N1/content_digest
index 660f707..9080919 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,17 +1,7 @@
- "From\0Kumar Gala <galak@codeaurora.org>\0"
+ "From\0galak@codeaurora.org (Kumar Gala)\0"
  "Subject\0[PATCH] ARM: dts: qcom: Update msm8960 device trees\0"
  "Date\0Wed, 28 May 2014 13:27:23 -0500\0"
- "To\0Rob Herring <robh+dt@kernel.org>"
-  Pawel Moll <pawel.moll@arm.com>
-  Mark Rutland <mark.rutland@arm.com>
-  Ian Campbell <ijc+devicetree@hellion.org.uk>
-  Kumar Gala <galak@codeaurora.org>
-  Russell King <linux@arm.linux.org.uk>
- " David Brown <davidb@codeaurora.org>\0"
- "Cc\0devicetree@vger.kernel.org"
-  linux-kernel@vger.kernel.org
-  linux-arm-kernel@lists.infradead.org
- " linux-arm-msm@vger.kernel.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "* Move SoC peripherals into an SoC container node\n"
@@ -37,7 +27,7 @@
  " \tcompatible = \"qcom,msm8960-cdp\", \"qcom,msm8960\";\n"
  "+\n"
  "+\tsoc {\n"
- "+\t\tserial@16440000 {\n"
+ "+\t\tserial at 16440000 {\n"
  "+\t\t\tstatus = \"ok\";\n"
  "+\t\t};\n"
  "+\t};\n"
@@ -53,7 +43,7 @@
  "-\t\tcompatible = \"qcom,krait\";\n"
  "-\t\tenable-method = \"qcom,kpss-acc-v1\";\n"
  " \n"
- " \t\tcpu@0 {\n"
+ " \t\tcpu at 0 {\n"
  "+\t\t\tcompatible = \"qcom,krait\";\n"
  "+\t\t\tenable-method = \"qcom,kpss-acc-v1\";\n"
  " \t\t\tdevice_type = \"cpu\";\n"
@@ -62,7 +52,7 @@
  "@@ -25,6 +25,8 @@\n"
  " \t\t};\n"
  " \n"
- " \t\tcpu@1 {\n"
+ " \t\tcpu at 1 {\n"
  "+\t\t\tcompatible = \"qcom,krait\";\n"
  "+\t\t\tenable-method = \"qcom,kpss-acc-v1\";\n"
  " \t\t\tdevice_type = \"cpu\";\n"
@@ -80,7 +70,7 @@
  " \t\tqcom,no-pc-write;\n"
  " \t};\n"
  " \n"
- "-\tintc: interrupt-controller@2000000 {\n"
+ "-\tintc: interrupt-controller at 2000000 {\n"
  "-\t\tcompatible = \"qcom,msm-qgic2\";\n"
  "-\t\tinterrupt-controller;\n"
  "-\t\t#interrupt-cells = <3>;\n"
@@ -93,7 +83,7 @@
  "+\t\tranges;\n"
  "+\t\tcompatible = \"simple-bus\";\n"
  "+\n"
- "+\t\tintc: interrupt-controller@2000000 {\n"
+ "+\t\tintc: interrupt-controller at 2000000 {\n"
  "+\t\t\tcompatible = \"qcom,msm-qgic2\";\n"
  "+\t\t\tinterrupt-controller;\n"
  "+\t\t\t#interrupt-cells = <3>;\n"
@@ -101,7 +91,7 @@
  "+\t\t\t      <0x02002000 0x1000>;\n"
  "+\t\t};\n"
  " \n"
- "-\ttimer@200a000 {\n"
+ "-\ttimer at 200a000 {\n"
  "-\t\tcompatible = \"qcom,kpss-timer\", \"qcom,msm-timer\";\n"
  "-\t\tinterrupts = <1 1 0x301>,\n"
  "-\t\t\t     <1 2 0x301>,\n"
@@ -111,7 +101,7 @@
  "-\t\t\t\t  <32768>;\n"
  "-\t\tcpu-offset = <0x80000>;\n"
  "-\t};\n"
- "+\t\ttimer@200a000 {\n"
+ "+\t\ttimer at 200a000 {\n"
  "+\t\t\tcompatible = \"qcom,kpss-timer\", \"qcom,msm-timer\";\n"
  "+\t\t\tinterrupts = <1 1 0x301>,\n"
  "+\t\t\t\t     <1 2 0x301>,\n"
@@ -122,7 +112,7 @@
  "+\t\t\tcpu-offset = <0x80000>;\n"
  "+\t\t};\n"
  " \n"
- "-\tmsmgpio: gpio@800000 {\n"
+ "-\tmsmgpio: gpio at 800000 {\n"
  "-\t\tcompatible = \"qcom,msm-gpio\";\n"
  "-\t\tgpio-controller;\n"
  "-\t\t#gpio-cells = <2>;\n"
@@ -132,7 +122,7 @@
  "-\t\t#interrupt-cells = <2>;\n"
  "-\t\treg = <0x800000 0x4000>;\n"
  "-\t};\n"
- "+\t\tmsmgpio: gpio@800000 {\n"
+ "+\t\tmsmgpio: gpio at 800000 {\n"
  "+\t\t\tcompatible = \"qcom,msm-gpio\";\n"
  "+\t\t\tgpio-controller;\n"
  "+\t\t\t#gpio-cells = <2>;\n"
@@ -143,73 +133,73 @@
  "+\t\t\treg = <0x800000 0x4000>;\n"
  "+\t\t};\n"
  " \n"
- "-\tgcc: clock-controller@900000 {\n"
+ "-\tgcc: clock-controller at 900000 {\n"
  "-\t\tcompatible = \"qcom,gcc-msm8960\";\n"
  "-\t\t#clock-cells = <1>;\n"
  "-\t\t#reset-cells = <1>;\n"
  "-\t\treg = <0x900000 0x4000>;\n"
  "-\t};\n"
- "+\t\tgcc: clock-controller@900000 {\n"
+ "+\t\tgcc: clock-controller at 900000 {\n"
  "+\t\t\tcompatible = \"qcom,gcc-msm8960\";\n"
  "+\t\t\t#clock-cells = <1>;\n"
  "+\t\t\t#reset-cells = <1>;\n"
  "+\t\t\treg = <0x900000 0x4000>;\n"
  "+\t\t};\n"
  " \n"
- "-\tclock-controller@4000000 {\n"
+ "-\tclock-controller at 4000000 {\n"
  "-\t\tcompatible = \"qcom,mmcc-msm8960\";\n"
  "-\t\treg = <0x4000000 0x1000>;\n"
  "-\t\t#clock-cells = <1>;\n"
  "-\t\t#reset-cells = <1>;\n"
  "-\t};\n"
- "+\t\tclock-controller@4000000 {\n"
+ "+\t\tclock-controller at 4000000 {\n"
  "+\t\t\tcompatible = \"qcom,mmcc-msm8960\";\n"
  "+\t\t\treg = <0x4000000 0x1000>;\n"
  "+\t\t\t#clock-cells = <1>;\n"
  "+\t\t\t#reset-cells = <1>;\n"
  "+\t\t};\n"
  " \n"
- "-\tacc0: clock-controller@2088000 {\n"
+ "-\tacc0: clock-controller at 2088000 {\n"
  "-\t\tcompatible = \"qcom,kpss-acc-v1\";\n"
  "-\t\treg = <0x02088000 0x1000>, <0x02008000 0x1000>;\n"
  "-\t};\n"
- "+\t\tacc0: clock-controller@2088000 {\n"
+ "+\t\tacc0: clock-controller at 2088000 {\n"
  "+\t\t\tcompatible = \"qcom,kpss-acc-v1\";\n"
  "+\t\t\treg = <0x02088000 0x1000>, <0x02008000 0x1000>;\n"
  "+\t\t};\n"
  " \n"
- "-\tacc1: clock-controller@2098000 {\n"
+ "-\tacc1: clock-controller at 2098000 {\n"
  "-\t\tcompatible = \"qcom,kpss-acc-v1\";\n"
  "-\t\treg = <0x02098000 0x1000>, <0x02008000 0x1000>;\n"
  "-\t};\n"
- "+\t\tacc1: clock-controller@2098000 {\n"
+ "+\t\tacc1: clock-controller at 2098000 {\n"
  "+\t\t\tcompatible = \"qcom,kpss-acc-v1\";\n"
  "+\t\t\treg = <0x02098000 0x1000>, <0x02008000 0x1000>;\n"
  "+\t\t};\n"
  " \n"
- "-\tsaw0: regulator@2089000 {\n"
+ "-\tsaw0: regulator at 2089000 {\n"
  "-\t\tcompatible = \"qcom,saw2\";\n"
  "-\t\treg = <0x02089000 0x1000>, <0x02009000 0x1000>;\n"
  "-\t\tregulator;\n"
  "-\t};\n"
- "+\t\tsaw0: regulator@2089000 {\n"
+ "+\t\tsaw0: regulator at 2089000 {\n"
  "+\t\t\tcompatible = \"qcom,saw2\";\n"
  "+\t\t\treg = <0x02089000 0x1000>, <0x02009000 0x1000>;\n"
  "+\t\t\tregulator;\n"
  "+\t\t};\n"
  " \n"
- "-\tsaw1: regulator@2099000 {\n"
+ "-\tsaw1: regulator at 2099000 {\n"
  "-\t\tcompatible = \"qcom,saw2\";\n"
  "-\t\treg = <0x02099000 0x1000>, <0x02009000 0x1000>;\n"
  "-\t\tregulator;\n"
  "-\t};\n"
- "+\t\tsaw1: regulator@2099000 {\n"
+ "+\t\tsaw1: regulator at 2099000 {\n"
  "+\t\t\tcompatible = \"qcom,saw2\";\n"
  "+\t\t\treg = <0x02099000 0x1000>, <0x02009000 0x1000>;\n"
  "+\t\t\tregulator;\n"
  "+\t\t};\n"
  " \n"
- "-\tserial@16440000 {\n"
+ "-\tserial at 16440000 {\n"
  "-\t\tcompatible = \"qcom,msm-uartdm-v1.3\", \"qcom,msm-uartdm\";\n"
  "-\t\treg = <0x16440000 0x1000>,\n"
  "-\t\t      <0x16400000 0x1000>;\n"
@@ -217,7 +207,7 @@
  "-\t\tclocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;\n"
  "-\t\tclock-names = \"core\", \"iface\";\n"
  "-\t};\n"
- "+\t\tserial@16440000 {\n"
+ "+\t\tserial at 16440000 {\n"
  "+\t\t\tcompatible = \"qcom,msm-uartdm-v1.3\", \"qcom,msm-uartdm\";\n"
  "+\t\t\treg = <0x16440000 0x1000>,\n"
  "+\t\t\t      <0x16400000 0x1000>;\n"
@@ -227,23 +217,23 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  " \n"
- "-\tqcom,ssbi@500000 {\n"
+ "-\tqcom,ssbi at 500000 {\n"
  "-\t\tcompatible = \"qcom,ssbi\";\n"
  "-\t\treg = <0x500000 0x1000>;\n"
  "-\t\tqcom,controller-type = \"pmic-arbiter\";\n"
  "-\t};\n"
- "+\t\tqcom,ssbi@500000 {\n"
+ "+\t\tqcom,ssbi at 500000 {\n"
  "+\t\t\tcompatible = \"qcom,ssbi\";\n"
  "+\t\t\treg = <0x500000 0x1000>;\n"
  "+\t\t\tqcom,controller-type = \"pmic-arbiter\";\n"
  "+\t\t};\n"
  " \n"
- "-\trng@1a500000 {\n"
+ "-\trng at 1a500000 {\n"
  "-\t\tcompatible = \"qcom,prng\";\n"
  "-\t\treg = <0x1a500000 0x200>;\n"
  "-\t\tclocks = <&gcc PRNG_CLK>;\n"
  "-\t\tclock-names = \"core\";\n"
- "+\t\trng@1a500000 {\n"
+ "+\t\trng at 1a500000 {\n"
  "+\t\t\tcompatible = \"qcom,prng\";\n"
  "+\t\t\treg = <0x1a500000 0x200>;\n"
  "+\t\t\tclocks = <&gcc PRNG_CLK>;\n"
@@ -255,4 +245,4 @@
  "The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\n"
  hosted by The Linux Foundation
 
-fc1f188728cde462eff6a046fcdb80b3d90af7c7322ebec60655d214fa05af93
+5b2b61da9fd598d9f1646142a4567ab735c9ee6e778676baaa0c2a14e92784d9

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