From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 2/4] drm/i915/vlv: Ack interrupts before handling them (VLV) Date: Mon, 16 Jun 2014 16:19:30 +0300 Message-ID: <1402924770.22308.2.camel@intelbox> References: <1402918229-7246-1-git-send-email-oscar.mateo@intel.com> <1402918229-7246-2-git-send-email-oscar.mateo@intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2051771456==" Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id D28156E544 for ; Mon, 16 Jun 2014 06:19:32 -0700 (PDT) In-Reply-To: <1402918229-7246-2-git-send-email-oscar.mateo@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: oscar.mateo@intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============2051771456== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-4Ygta7o1EEeH9SoGwPh9" --=-4Ygta7o1EEeH9SoGwPh9 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2014-06-16 at 12:30 +0100, oscar.mateo@intel.com wrote: > From: Oscar Mateo >=20 > Otherwise, we might receive a new interrupt before we have time to > ack the first one, eventually missing it. >=20 > Notice that, before clearing a port-sourced interrupt in the IIR, the > corresponding interrupt source status in the PORT_HOTPLUG_STAT must be > cleared. >=20 > Spotted by Bob Beckett . >=20 > Signed-off-by: Oscar Mateo > --- > drivers/gpu/drm/i915/i915_irq.c | 61 +++++++++++++++++++++++------------= ------ > 1 file changed, 35 insertions(+), 26 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_= irq.c > index 4439e2d..9d381cc 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1813,26 +1813,28 @@ static void i9xx_hpd_irq_handler(struct drm_devic= e *dev) > struct drm_i915_private *dev_priv =3D dev->dev_private; > u32 hotplug_status =3D I915_READ(PORT_HOTPLUG_STAT); > =20 > - if (IS_G4X(dev)) { > - u32 hotplug_trigger =3D hotplug_status & HOTPLUG_INT_STATUS_G4X; > + if (hotplug_status) { > + I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status); > + /* > + * Make sure hotplug status is cleared before we clear IIR, or else we > + * may miss hotplug events. > + */ > + POSTING_READ(PORT_HOTPLUG_STAT); > =20 > - intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_g4x); > - } else { > - u32 hotplug_trigger =3D hotplug_status & HOTPLUG_INT_STATUS_I915; > + if (IS_G4X(dev)) { > + u32 hotplug_trigger =3D hotplug_status & HOTPLUG_INT_STATUS_G4X; > =20 > - intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915); > - } > + intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_g4x); > + } else { > + u32 hotplug_trigger =3D hotplug_status & HOTPLUG_INT_STATUS_I915; > =20 > - if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) && > - hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X) > - dp_aux_irq_handler(dev); > + intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915); > + } > =20 > - I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status); > - /* > - * Make sure hotplug status is cleared before we clear IIR, or else we > - * may miss hotplug events. > - */ > - POSTING_READ(PORT_HOTPLUG_STAT); > + if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) && > + hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X) > + dp_aux_irq_handler(dev); > + } > } > =20 > static irqreturn_t valleyview_irq_handler(int irq, void *arg) > @@ -1843,29 +1845,36 @@ static irqreturn_t valleyview_irq_handler(int irq= , void *arg) > irqreturn_t ret =3D IRQ_NONE; > =20 > while (true) { > - iir =3D I915_READ(VLV_IIR); > gt_iir =3D I915_READ(GTIIR); > pm_iir =3D I915_READ(GEN6_PMIIR); > + iir =3D I915_READ(VLV_IIR); > =20 > if (gt_iir =3D=3D 0 && pm_iir =3D=3D 0 && iir =3D=3D 0) > goto out; > =20 > - ret =3D IRQ_HANDLED; > + if (gt_iir) > + I915_WRITE(GTIIR, gt_iir); > =20 > - snb_gt_irq_handler(dev, dev_priv, gt_iir); > + if (pm_iir) > + I915_WRITE(GEN6_PMIIR, pm_iir); > =20 > - valleyview_pipestat_irq_handler(dev, iir); > + if (iir) { > + /* Consume port. Then clear IIR or we'll miss events */ > + if (iir & I915_DISPLAY_PORT_INTERRUPT) > + i9xx_hpd_irq_handler(dev); > + I915_WRITE(VLV_IIR, iir); > + } > =20 > - /* Consume port. Then clear IIR or we'll miss events */ > - if (iir & I915_DISPLAY_PORT_INTERRUPT) > - i9xx_hpd_irq_handler(dev); > + ret =3D IRQ_HANDLED; > + > + if (gt_iir) > + snb_gt_irq_handler(dev, dev_priv, gt_iir); > =20 > if (pm_iir) > gen6_rps_irq_handler(dev_priv, pm_iir); > =20 > - I915_WRITE(GTIIR, gt_iir); > - I915_WRITE(GEN6_PMIIR, pm_iir); > - I915_WRITE(VLV_IIR, iir); > + if (iir) > + valleyview_pipestat_irq_handler(dev, iir); Afaik the pipe underrun flag handled in valleyview_pipestat_irq_handler() is not signaled in IIR, although bspec is rather unclear about this. --Imre --=-4Ygta7o1EEeH9SoGwPh9 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTnu7iAAoJEORIIAnNuWDFUKcH/iJQP4Mr3B5Bf8Vgj/y/hO39 sRcJbUqDKNel89IDWwR5tzbTJolYtOEPcZvFw+6TzS+AkWAnxhTZ1QN/0N6EzS1n MWbKQektcbEqRO+iLdyB6A2sdPX2VFxWsRUCP9l/eFXI2iX6XqKBkCLJ2aZzPHC5 00gdMF7oDjkb4x3m6zbxoyDfxEwi+BCTfcKmg/eyHbygPjrKId3DVHQYl4QDH5NA m9/fucHe3uWd4yxFGeJmbAJNk48ntgRLJjnmEzlwIrhtPSLFCAVRKM8mNzLm4Ylt IS9KWq49ZGVjvwfpRRxNUU7w0qZTj9ODGpTPG0/6Uy6ZfLwJYRpKH/luEIBki9A= =iuUC -----END PGP SIGNATURE----- --=-4Ygta7o1EEeH9SoGwPh9-- --===============2051771456== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============2051771456==--