diff for duplicates of <1403654783-7176-13-git-send-email-sboyd@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index 2e68645..eac5f74 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -35,7 +35,7 @@ index 5303e53e34dc..94eeca22986f 100644 + }; - cpu@1 { + cpu at 1 { @@ -33,6 +51,24 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; @@ -74,25 +74,25 @@ index 5303e53e34dc..94eeca22986f 100644 #address-cells = <1>; #size-cells = <1>; @@ -100,11 +141,19 @@ - acc0: clock-controller@2088000 { + acc0: clock-controller at 2088000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + clock-output-names = "acpu0_aux"; }; - acc1: clock-controller@2098000 { + acc1: clock-controller at 2098000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + clock-output-names = "acpu1_aux"; + }; + -+ l2cc: clock-controller@2011000 { ++ l2cc: clock-controller at 2011000 { + compatible = "qcom,kpss-gcc"; + reg = <0x2011000 0x1000>; + clock-output-names = "acpu_l2_aux"; }; - saw0: regulator@2089000 { + saw0: regulator at 2089000 { diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 69dca2aca25a..e607063b527a 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -101,8 +101,8 @@ index 69dca2aca25a..e607063b527a 100644 #size-cells = <0>; interrupts = <1 9 0xf04>; -- cpu@0 { -+ cpu0: cpu@0 { +- cpu at 0 { ++ cpu0: cpu at 0 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v2"; device_type = "cpu"; @@ -127,8 +127,8 @@ index 69dca2aca25a..e607063b527a 100644 + clock-latency = <100000>; }; -- cpu@1 { -+ cpu1: cpu@1 { +- cpu at 1 { ++ cpu1: cpu at 1 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v2"; device_type = "cpu"; @@ -153,8 +153,8 @@ index 69dca2aca25a..e607063b527a 100644 + clock-latency = <100000>; }; -- cpu@2 { -+ cpu2: cpu@2 { +- cpu at 2 { ++ cpu2: cpu at 2 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v2"; device_type = "cpu"; @@ -179,8 +179,8 @@ index 69dca2aca25a..e607063b527a 100644 + clock-latency = <100000>; }; -- cpu@3 { -+ cpu3: cpu@3 { +- cpu at 3 { ++ cpu3: cpu at 3 { compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v2"; device_type = "cpu"; @@ -221,37 +221,37 @@ index 69dca2aca25a..e607063b527a 100644 }; }; -+ clock-controller@f9016000 { ++ clock-controller at f9016000 { + compatible = "qcom,hfpll"; + reg = <0xf9016000 0x30>; + clock-output-names = "hfpll_l2"; + }; + -+ clock-controller@f908a000 { ++ clock-controller at f908a000 { + compatible = "qcom,hfpll"; + reg = <0xf908a000 0x30>, <0xf900a000 0x30>; + clock-output-names = "hfpll0"; + }; + -+ clock-controller@f909a000 { ++ clock-controller at f909a000 { + compatible = "qcom,hfpll"; + reg = <0xf909a000 0x30>, <0xf900a000 0x30>; + clock-output-names = "hfpll1"; + }; + -+ clock-controller@f90aa000 { ++ clock-controller at f90aa000 { + compatible = "qcom,hfpll"; + reg = <0xf90aa000 0x30>, <0xf900a000 0x30>; + clock-output-names = "hfpll2"; + }; + -+ clock-controller@f90ba000 { ++ clock-controller at f90ba000 { + compatible = "qcom,hfpll"; + reg = <0xf90ba000 0x30>, <0xf900a000 0x30>; + clock-output-names = "hfpll3"; + }; + - saw_l2: regulator@f9012000 { + saw_l2: regulator at f9012000 { compatible = "qcom,saw2"; reg = <0xf9012000 0x1000>; -- diff --git a/a/content_digest b/N1/content_digest index 4a974e3..1634da3 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,11 +1,8 @@ "ref\01403654783-7176-1-git-send-email-sboyd@codeaurora.org\0" - "From\0Stephen Boyd <sboyd@codeaurora.org>\0" + "From\0sboyd@codeaurora.org (Stephen Boyd)\0" "Subject\0[RFC/PATCH 12/12] ARM: dts: qcom: Add necessary DT data for Krait cpufreq\0" "Date\0Tue, 24 Jun 2014 17:06:23 -0700\0" - "To\0linux-arm-msm@vger.kernel.org\0" - "Cc\0linux-arm-kernel@lists.infradead.org" - linux-kernel@vger.kernel.org - " Mike Turquette <mturquette@linaro.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Add the necessary DT nodes and data so we can probe the cpufreq\n" @@ -45,7 +42,7 @@ "+\n" " \t\t};\n" " \n" - " \t\tcpu@1 {\n" + " \t\tcpu at 1 {\n" "@@ -33,6 +51,24 @@\n" " \t\t\tnext-level-cache = <&L2>;\n" " \t\t\tqcom,acc = <&acc1>;\n" @@ -84,25 +81,25 @@ " \t\t#address-cells = <1>;\n" " \t\t#size-cells = <1>;\n" "@@ -100,11 +141,19 @@\n" - " \t\tacc0: clock-controller@2088000 {\n" + " \t\tacc0: clock-controller at 2088000 {\n" " \t\t\tcompatible = \"qcom,kpss-acc-v1\";\n" " \t\t\treg = <0x02088000 0x1000>, <0x02008000 0x1000>;\n" "+\t\t\tclock-output-names = \"acpu0_aux\";\n" " \t\t};\n" " \n" - " \t\tacc1: clock-controller@2098000 {\n" + " \t\tacc1: clock-controller at 2098000 {\n" " \t\t\tcompatible = \"qcom,kpss-acc-v1\";\n" " \t\t\treg = <0x02098000 0x1000>, <0x02008000 0x1000>;\n" "+\t\t\tclock-output-names = \"acpu1_aux\";\n" "+\t\t};\n" "+\n" - "+\t\tl2cc: clock-controller@2011000 {\n" + "+\t\tl2cc: clock-controller at 2011000 {\n" "+\t\t\tcompatible = \"qcom,kpss-gcc\";\n" "+\t\t\treg = <0x2011000 0x1000>;\n" "+\t\t\tclock-output-names = \"acpu_l2_aux\";\n" " \t\t};\n" " \n" - " \t\tsaw0: regulator@2089000 {\n" + " \t\tsaw0: regulator at 2089000 {\n" "diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi\n" "index 69dca2aca25a..e607063b527a 100644\n" "--- a/arch/arm/boot/dts/qcom-msm8974.dtsi\n" @@ -111,8 +108,8 @@ " \t\t#size-cells = <0>;\n" " \t\tinterrupts = <1 9 0xf04>;\n" " \n" - "-\t\tcpu@0 {\n" - "+\t\tcpu0: cpu@0 {\n" + "-\t\tcpu at 0 {\n" + "+\t\tcpu0: cpu at 0 {\n" " \t\t\tcompatible = \"qcom,krait\";\n" " \t\t\tenable-method = \"qcom,kpss-acc-v2\";\n" " \t\t\tdevice_type = \"cpu\";\n" @@ -137,8 +134,8 @@ "+\t\t\tclock-latency = <100000>;\n" " \t\t};\n" " \n" - "-\t\tcpu@1 {\n" - "+\t\tcpu1: cpu@1 {\n" + "-\t\tcpu at 1 {\n" + "+\t\tcpu1: cpu at 1 {\n" " \t\t\tcompatible = \"qcom,krait\";\n" " \t\t\tenable-method = \"qcom,kpss-acc-v2\";\n" " \t\t\tdevice_type = \"cpu\";\n" @@ -163,8 +160,8 @@ "+\t\t\tclock-latency = <100000>;\n" " \t\t};\n" " \n" - "-\t\tcpu@2 {\n" - "+\t\tcpu2: cpu@2 {\n" + "-\t\tcpu at 2 {\n" + "+\t\tcpu2: cpu at 2 {\n" " \t\t\tcompatible = \"qcom,krait\";\n" " \t\t\tenable-method = \"qcom,kpss-acc-v2\";\n" " \t\t\tdevice_type = \"cpu\";\n" @@ -189,8 +186,8 @@ "+\t\t\tclock-latency = <100000>;\n" " \t\t};\n" " \n" - "-\t\tcpu@3 {\n" - "+\t\tcpu3: cpu@3 {\n" + "-\t\tcpu at 3 {\n" + "+\t\tcpu3: cpu at 3 {\n" " \t\t\tcompatible = \"qcom,krait\";\n" " \t\t\tenable-method = \"qcom,kpss-acc-v2\";\n" " \t\t\tdevice_type = \"cpu\";\n" @@ -231,41 +228,41 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "+\t\tclock-controller@f9016000 {\n" + "+\t\tclock-controller at f9016000 {\n" "+\t\t\tcompatible = \"qcom,hfpll\";\n" "+\t\t\treg = <0xf9016000 0x30>;\n" "+\t\t\tclock-output-names = \"hfpll_l2\";\n" "+\t\t};\n" "+\n" - "+\t\tclock-controller@f908a000 {\n" + "+\t\tclock-controller at f908a000 {\n" "+\t\t\tcompatible = \"qcom,hfpll\";\n" "+\t\t\treg = <0xf908a000 0x30>, <0xf900a000 0x30>;\n" "+\t\t\tclock-output-names = \"hfpll0\";\n" "+\t\t};\n" "+\n" - "+\t\tclock-controller@f909a000 {\n" + "+\t\tclock-controller at f909a000 {\n" "+\t\t\tcompatible = \"qcom,hfpll\";\n" "+\t\t\treg = <0xf909a000 0x30>, <0xf900a000 0x30>;\n" "+\t\t\tclock-output-names = \"hfpll1\";\n" "+\t\t};\n" "+\n" - "+\t\tclock-controller@f90aa000 {\n" + "+\t\tclock-controller at f90aa000 {\n" "+\t\t\tcompatible = \"qcom,hfpll\";\n" "+\t\t\treg = <0xf90aa000 0x30>, <0xf900a000 0x30>;\n" "+\t\t\tclock-output-names = \"hfpll2\";\n" "+\t\t};\n" "+\n" - "+\t\tclock-controller@f90ba000 {\n" + "+\t\tclock-controller at f90ba000 {\n" "+\t\t\tcompatible = \"qcom,hfpll\";\n" "+\t\t\treg = <0xf90ba000 0x30>, <0xf900a000 0x30>;\n" "+\t\t\tclock-output-names = \"hfpll3\";\n" "+\t\t};\n" "+\n" - " \t\tsaw_l2: regulator@f9012000 {\n" + " \t\tsaw_l2: regulator at f9012000 {\n" " \t\t\tcompatible = \"qcom,saw2\";\n" " \t\t\treg = <0xf9012000 0x1000>;\n" "-- \n" "The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\n" hosted by The Linux Foundation -77b3c2c4a8629ce2333b98d0a87ab2cb6b151a10d49108566fcc3bd774133c66 +c0fedefd5df339757e70d77a394c03123c6a9b3ade907d27aef181dbbdcd3850
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.