From: Thomas Daniel <thomas.daniel@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 25/43] drm/i915/bdw: Workload submission mechanism for Execlists
Date: Thu, 24 Jul 2014 17:04:33 +0100 [thread overview]
Message-ID: <1406217891-8912-26-git-send-email-thomas.daniel@intel.com> (raw)
In-Reply-To: <1406217891-8912-1-git-send-email-thomas.daniel@intel.com>
From: Oscar Mateo <oscar.mateo@intel.com>
This is what i915_gem_do_execbuffer calls when it wants to execute some
worload in an Execlists world.
v2: Check arguments before doing stuff in intel_execlists_submission. Also,
get rel_constants parsing right.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 6 ++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 +-
drivers/gpu/drm/i915/intel_lrc.c | 130 +++++++++++++++++++++++++++-
3 files changed, 137 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1caed52..4303e2c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2239,6 +2239,12 @@ int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
+void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
+ struct intel_engine_cs *ring);
+void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
+ struct drm_file *file,
+ struct intel_engine_cs *ring,
+ struct drm_i915_gem_object *obj);
int i915_gem_ringbuffer_submission(struct drm_device *dev,
struct drm_file *file,
struct intel_engine_cs *ring,
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 8c63d79..cae7df8 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -962,7 +962,7 @@ i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
return ctx;
}
-static void
+void
i915_gem_execbuffer_move_to_active(struct list_head *vmas,
struct intel_engine_cs *ring)
{
@@ -994,7 +994,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
}
}
-static void
+void
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
struct drm_file *file,
struct intel_engine_cs *ring,
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 55ee8dd..cd834b3 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -89,6 +89,57 @@ int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists
return 0;
}
+static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf)
+{
+ struct intel_engine_cs *ring = ringbuf->ring;
+ uint32_t flush_domains;
+ int ret;
+
+ flush_domains = 0;
+ if (ring->gpu_caches_dirty)
+ flush_domains = I915_GEM_GPU_DOMAINS;
+
+ ret = ring->emit_flush(ringbuf, I915_GEM_GPU_DOMAINS, flush_domains);
+ if (ret)
+ return ret;
+
+ ring->gpu_caches_dirty = false;
+ return 0;
+}
+
+static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
+ struct list_head *vmas)
+{
+ struct intel_engine_cs *ring = ringbuf->ring;
+ struct i915_vma *vma;
+ uint32_t flush_domains = 0;
+ bool flush_chipset = false;
+ int ret;
+
+ list_for_each_entry(vma, vmas, exec_list) {
+ struct drm_i915_gem_object *obj = vma->obj;
+ ret = i915_gem_object_sync(obj, ring);
+ if (ret)
+ return ret;
+
+ if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
+ flush_chipset |= i915_gem_clflush_object(obj, false);
+
+ flush_domains |= obj->base.write_domain;
+ }
+
+ if (flush_chipset)
+ i915_gem_chipset_flush(ring->dev);
+
+ if (flush_domains & I915_GEM_DOMAIN_GTT)
+ wmb();
+
+ /* Unconditionally invalidate gpu caches and ensure that we do flush
+ * any residual writes from the previous batch.
+ */
+ return logical_ring_invalidate_all_caches(ringbuf);
+}
+
int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
struct intel_engine_cs *ring,
struct intel_context *ctx,
@@ -97,7 +148,84 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
struct drm_i915_gem_object *batch_obj,
u64 exec_start, u32 flags)
{
- /* TODO */
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
+ int instp_mode;
+ u32 instp_mask;
+ int ret;
+
+ instp_mode = args->flags & I915_EXEC_CONSTANTS_MASK;
+ instp_mask = I915_EXEC_CONSTANTS_MASK;
+ switch (instp_mode) {
+ case I915_EXEC_CONSTANTS_REL_GENERAL:
+ case I915_EXEC_CONSTANTS_ABSOLUTE:
+ case I915_EXEC_CONSTANTS_REL_SURFACE:
+ if (instp_mode != 0 && ring != &dev_priv->ring[RCS]) {
+ DRM_DEBUG("non-0 rel constants mode on non-RCS\n");
+ return -EINVAL;
+ }
+
+ if (instp_mode != dev_priv->relative_constants_mode) {
+ if (instp_mode == I915_EXEC_CONSTANTS_REL_SURFACE) {
+ DRM_DEBUG("rel surface constants mode invalid on gen5+\n");
+ return -EINVAL;
+ }
+
+ /* The HW changed the meaning on this bit on gen6 */
+ instp_mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
+ }
+ break;
+ default:
+ DRM_DEBUG("execbuf with unknown constants: %d\n", instp_mode);
+ return -EINVAL;
+ }
+
+ if (args->num_cliprects != 0) {
+ DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
+ return -EINVAL;
+ } else {
+ if (args->DR4 == 0xffffffff) {
+ DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
+ args->DR4 = 0;
+ }
+
+ if (args->DR1 || args->DR4 || args->cliprects_ptr) {
+ DRM_DEBUG("0 cliprects but dirt in cliprects fields\n");
+ return -EINVAL;
+ }
+ }
+
+ if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
+ DRM_DEBUG("sol reset is gen7 only\n");
+ return -EINVAL;
+ }
+
+ ret = execlists_move_to_gpu(ringbuf, vmas);
+ if (ret)
+ return ret;
+
+ if (ring == &dev_priv->ring[RCS] &&
+ instp_mode != dev_priv->relative_constants_mode) {
+ ret = intel_logical_ring_begin(ringbuf, 4);
+ if (ret)
+ return ret;
+
+ intel_logical_ring_emit(ringbuf, MI_NOOP);
+ intel_logical_ring_emit(ringbuf, MI_LOAD_REGISTER_IMM(1));
+ intel_logical_ring_emit(ringbuf, INSTPM);
+ intel_logical_ring_emit(ringbuf, instp_mask << 16 | instp_mode);
+ intel_logical_ring_advance(ringbuf);
+
+ dev_priv->relative_constants_mode = instp_mode;
+ }
+
+ ret = ring->emit_bb_start(ringbuf, exec_start, flags);
+ if (ret)
+ return ret;
+
+ i915_gem_execbuffer_move_to_active(vmas, ring);
+ i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+
return 0;
}
--
1.7.9.5
next prev parent reply other threads:[~2014-07-24 16:05 UTC|newest]
Thread overview: 137+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-24 16:04 [PATCH 00/43] Execlists v5 Thomas Daniel
2014-07-24 16:04 ` [PATCH 01/43] drm/i915: Reorder the actual workload submission so that args checking is done earlier Thomas Daniel
2014-07-25 8:30 ` Daniel Vetter
2014-07-25 9:16 ` Chris Wilson
2014-07-24 16:04 ` [PATCH 02/43] drm/i915/bdw: New source and header file for LRs, LRCs and Execlists Thomas Daniel
2014-07-24 16:04 ` [PATCH 03/43] drm/i915/bdw: Macro for LRCs and module option for Execlists Thomas Daniel
2014-08-11 13:57 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 04/43] drm/i915/bdw: Initialization for Logical Ring Contexts Thomas Daniel
2014-08-11 14:03 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 05/43] drm/i915/bdw: Introduce one context backing object per engine Thomas Daniel
2014-08-11 13:59 ` [PATCH] drm/i915: WARN if module opt sanitization goes out of order Daniel Vetter
2014-08-11 14:28 ` Damien Lespiau
2014-07-24 16:04 ` [PATCH 06/43] drm/i915/bdw: A bit more advanced LR context alloc/free Thomas Daniel
2014-07-24 16:04 ` [PATCH 07/43] drm/i915/bdw: Allocate ringbuffers for Logical Ring Contexts Thomas Daniel
2014-07-24 16:04 ` [PATCH 08/43] drm/i915/bdw: Add a context and an engine pointers to the ringbuffer Thomas Daniel
2014-08-11 14:14 ` Daniel Vetter
2014-08-11 14:20 ` Daniel Vetter
2014-08-13 13:34 ` Daniel, Thomas
2014-08-13 15:16 ` Daniel Vetter
2014-08-14 15:09 ` Daniel, Thomas
2014-08-14 15:32 ` Daniel Vetter
2014-08-14 15:37 ` Daniel Vetter
2014-08-14 15:56 ` Daniel, Thomas
2014-08-14 16:19 ` Daniel Vetter
2014-08-14 16:27 ` [PATCH] drm/i915: Add temporary ring->ctx backpointer Daniel Vetter
2014-08-14 16:33 ` Daniel, Thomas
2014-07-24 16:04 ` [PATCH 09/43] drm/i915/bdw: Populate LR contexts (somewhat) Thomas Daniel
2014-07-24 16:04 ` [PATCH 10/43] drm/i915/bdw: Deferred creation of user-created LRCs Thomas Daniel
2014-08-11 14:25 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 11/43] drm/i915/bdw: Render moot context reset and switch with Execlists Thomas Daniel
2014-08-11 14:30 ` Daniel Vetter
2014-08-15 10:22 ` Daniel, Thomas
2014-08-15 15:39 ` Daniel Vetter
2014-08-20 15:29 ` [PATCH] " Thomas Daniel
2014-08-20 15:36 ` Chris Wilson
2014-08-25 20:39 ` Daniel Vetter
2014-08-25 22:01 ` Scot Doyle
2014-08-26 5:59 ` Chris Wilson
2014-08-26 13:54 ` Siluvery, Arun
2014-08-26 14:11 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 12/43] drm/i915/bdw: Don't write PDP in the legacy way when using LRCs Thomas Daniel
2014-08-01 13:46 ` Damien Lespiau
2014-08-07 12:17 ` Thomas Daniel
2014-08-08 15:59 ` Damien Lespiau
2014-08-11 14:32 ` Daniel Vetter
2014-08-15 11:01 ` [PATCH] " Thomas Daniel
2014-07-24 16:04 ` [PATCH 13/43] drm/i915: Abstract the legacy workload submission mechanism away Thomas Daniel
2014-08-11 14:36 ` Daniel Vetter
2014-08-11 14:39 ` Daniel Vetter
2014-08-11 14:39 ` Daniel Vetter
2014-08-11 15:02 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 14/43] drm/i915/bdw: Skeleton for the new logical rings submission path Thomas Daniel
2014-07-24 16:04 ` [PATCH 15/43] drm/i915/bdw: Generic logical ring init and cleanup Thomas Daniel
2014-08-11 15:01 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 16/43] drm/i915/bdw: GEN-specific logical ring init Thomas Daniel
2014-08-11 15:04 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 17/43] drm/i915/bdw: GEN-specific logical ring set/get seqno Thomas Daniel
2014-08-11 15:05 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 18/43] drm/i915/bdw: New logical ring submission mechanism Thomas Daniel
2014-08-11 20:40 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 19/43] drm/i915/bdw: GEN-specific logical ring emit request Thomas Daniel
2014-07-24 16:04 ` [PATCH 20/43] drm/i915/bdw: GEN-specific logical ring emit flush Thomas Daniel
2014-07-24 16:04 ` [PATCH 21/43] drm/i915/bdw: Emission of requests with logical rings Thomas Daniel
2014-08-11 20:56 ` Daniel Vetter
2014-08-13 13:34 ` Daniel, Thomas
2014-08-13 15:25 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 22/43] drm/i915/bdw: Ring idle and stop " Thomas Daniel
2014-07-24 16:04 ` [PATCH 23/43] drm/i915/bdw: Interrupts " Thomas Daniel
2014-08-11 21:02 ` Daniel Vetter
2014-08-11 21:08 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 24/43] drm/i915/bdw: GEN-specific logical ring emit batchbuffer start Thomas Daniel
2014-08-11 21:09 ` Daniel Vetter
2014-08-11 21:12 ` Daniel Vetter
2014-07-24 16:04 ` Thomas Daniel [this message]
2014-08-11 20:30 ` [PATCH 25/43] drm/i915/bdw: Workload submission mechanism for Execlists Daniel Vetter
2014-07-24 16:04 ` [PATCH 26/43] drm/i915/bdw: Always use MMIO flips with Execlists Thomas Daniel
2014-08-11 20:34 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 27/43] drm/i915/bdw: Render state init for Execlists Thomas Daniel
2014-08-11 21:25 ` Daniel Vetter
2014-08-13 15:07 ` Daniel, Thomas
2014-08-13 15:30 ` Daniel Vetter
2014-08-14 20:00 ` Daniel Vetter
2014-08-15 8:43 ` Daniel, Thomas
2014-08-20 15:55 ` Daniel, Thomas
2014-08-25 20:55 ` Daniel Vetter
2014-08-21 10:40 ` [PATCH] " Thomas Daniel
2014-08-28 9:40 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 28/43] drm/i915/bdw: Implement context switching (somewhat) Thomas Daniel
2014-08-11 21:29 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 29/43] drm/i915/bdw: Write the tail pointer, LRC style Thomas Daniel
2014-08-01 14:33 ` Damien Lespiau
2014-08-11 21:30 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 30/43] drm/i915/bdw: Two-stage execlist submit process Thomas Daniel
2014-08-14 20:05 ` Daniel Vetter
2014-08-14 20:10 ` Daniel Vetter
2014-08-15 8:51 ` Daniel, Thomas
2014-08-15 9:38 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 31/43] drm/i915/bdw: Handle context switch events Thomas Daniel
2014-08-14 20:13 ` Daniel Vetter
2014-08-14 20:17 ` Daniel Vetter
2014-08-14 20:28 ` Daniel Vetter
2014-08-14 20:37 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 32/43] drm/i915/bdw: Avoid non-lite-restore preemptions Thomas Daniel
2014-08-14 20:31 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 33/43] drm/i915/bdw: Help out the ctx switch interrupt handler Thomas Daniel
2014-08-14 20:43 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 34/43] drm/i915/bdw: Make sure gpu reset still works with Execlists Thomas Daniel
2014-08-01 14:42 ` Damien Lespiau
2014-08-06 9:26 ` Daniel, Thomas
2014-08-01 14:46 ` Damien Lespiau
2014-08-06 9:28 ` Daniel, Thomas
2014-07-24 16:04 ` [PATCH 35/43] drm/i915/bdw: Make sure error capture keeps working " Thomas Daniel
2014-08-15 12:14 ` Daniel Vetter
2014-08-21 10:57 ` Daniel, Thomas
2014-08-25 21:00 ` Daniel Vetter
2014-08-25 21:29 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 36/43] drm/i915/bdw: Disable semaphores for Execlists Thomas Daniel
2014-07-24 16:04 ` [PATCH 37/43] drm/i915/bdw: Display execlists info in debugfs Thomas Daniel
2014-08-01 14:54 ` Damien Lespiau
2014-08-07 12:23 ` Thomas Daniel
2014-08-08 16:02 ` Damien Lespiau
2014-07-24 16:04 ` [PATCH 38/43] drm/i915/bdw: Display context backing obj & ringbuffer " Thomas Daniel
2014-07-24 16:04 ` [PATCH 39/43] drm/i915/bdw: Print context state " Thomas Daniel
2014-08-01 15:54 ` Damien Lespiau
2014-08-07 12:24 ` Thomas Daniel
2014-08-08 15:57 ` Damien Lespiau
2014-07-24 16:04 ` [PATCH 40/43] drm/i915/bdw: Document Logical Rings, LR contexts and Execlists Thomas Daniel
2014-08-15 12:42 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 41/43] drm/i915/bdw: Enable Logical Ring Contexts (hence, Execlists) Thomas Daniel
2014-08-18 8:33 ` Jani Nikula
2014-08-18 14:52 ` Daniel, Thomas
2014-07-24 16:04 ` [PATCH 42/43] drm/i915/bdw: Pin the context backing objects to GGTT on-demand Thomas Daniel
2014-08-15 13:03 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 43/43] drm/i915/bdw: Pin the ringbuffer backing object " Thomas Daniel
2014-07-25 8:35 ` [PATCH 00/43] Execlists v5 Daniel Vetter
2014-08-01 16:09 ` Damien Lespiau
2014-08-01 16:29 ` Jesse Barnes
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