From: Tiejun Chen <tiejun.chen@intel.com>
To: mst@redhat.com
Cc: pbonzini@redhat.com, xen-devel@lists.xensource.com,
qemu-devel@nongnu.org, stefano.stabellini@eu.citrix.com
Subject: [Qemu-devel] [v3][PATCH 4/4] xen:hw:i386:pc_piix: introduce new machine for IGD passthrough
Date: Thu, 31 Jul 2014 20:09:34 +0800 [thread overview]
Message-ID: <1406808574-19728-5-git-send-email-tiejun.chen@intel.com> (raw)
In-Reply-To: <1406808574-19728-1-git-send-email-tiejun.chen@intel.com>
Now we can introduce a new machine, xenigd, specific to IGD
passthrough. This can avoid involving other common codes.
Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
---
hw/i386/pc_piix.c | 106 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 106 insertions(+)
v3:
* Rebase
v2:
* Unify prefix with XEN_IGD_PASSTHROUGH/xen_igd_passthrough like patch #3
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 0c40b06..cde39d6 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -232,6 +232,46 @@ static void pc_machine_pci_bus_init(MachineState *machine,
*pc_isa_bus = isa_bus;
}
+#ifdef CONFIG_XEN
+static void xen_igd_passthrough_pc_machine_pci_bus_init(MachineState *machine,
+ int pci_enabled,
+ PCII440FXState **pc_i440fx_state,
+ int *pc_piix3_devfn,
+ PCIBus **pc_pci_bus,
+ ISABus **pc_isa_bus,
+ qemu_irq *gsi,
+ MemoryRegion *pci_memory,
+ MemoryRegion *ram_memory)
+{
+ MemoryRegion *system_memory = get_system_memory();
+ MemoryRegion *system_io = get_system_io();
+ PCII440FXState *i440fx_state;
+ int piix3_devfn;
+ PCIBus *pci_bus;
+ ISABus *isa_bus;
+
+ if (pci_enabled) {
+ pci_bus = i440fx_init(TYPE_I440FX_PCI_HOST_BRIDGE,
+ TYPE_XEN_IGD_PASSTHROUGH_I440FX_PCI_DEVICE,
+ &i440fx_state, &piix3_devfn, &isa_bus, gsi,
+ system_memory, system_io, machine->ram_size,
+ below_4g_mem_size,
+ above_4g_mem_size,
+ pci_memory, ram_memory);
+ } else {
+ pci_bus = NULL;
+ i440fx_state = NULL;
+ isa_bus = isa_bus_new(NULL, system_io);
+ no_hpet = 1;
+ }
+
+ *pc_i440fx_state = i440fx_state;
+ *pc_piix3_devfn = piix3_devfn;
+ *pc_pci_bus = pci_bus;
+ *pc_isa_bus = isa_bus;
+}
+#endif
+
static void pc_machine_device_init(MachineState *machine,
int pci_enabled,
GSIState *gsi_state,
@@ -368,6 +408,38 @@ static void pc_init_pci(MachineState *machine)
pc_init1(machine, 1, 1);
}
+#ifdef CONFIG_XEN
+static void xen_igd_passthrough_pc_init1(MachineState *machine,
+ int pci_enabled,
+ int kvmclock_enabled)
+{
+ PCIBus *pci_bus = NULL;
+ ISABus *isa_bus = NULL;
+ PCII440FXState *i440fx_state = NULL;
+ int piix3_devfn = -1;
+ qemu_irq *gsi = NULL;
+ GSIState *gsi_state = NULL;
+ MemoryRegion *ram_memory = NULL;
+ MemoryRegion *pci_memory = NULL;
+ DeviceState *icc_bridge = NULL;
+ FWCfgState *fw_cfg = NULL;
+
+ pc_machine_base_init(machine, pci_enabled, kvmclock_enabled, &icc_bridge,
+ &ram_memory, &pci_memory, &gsi, &gsi_state, &fw_cfg);
+ xen_igd_passthrough_pc_machine_pci_bus_init(machine, pci_enabled,
+ &i440fx_state, &piix3_devfn,
+ &pci_bus, &isa_bus, gsi,
+ pci_memory, ram_memory);
+ pc_machine_device_init(machine, pci_enabled, gsi_state, icc_bridge,
+ piix3_devfn, fw_cfg, pci_bus, isa_bus, gsi);
+}
+
+static void xen_igd_passthrough_pc_init_pci(MachineState *machine)
+{
+ xen_igd_passthrough_pc_init1(machine, 1, 1);
+}
+#endif
+
static void pc_compat_2_0(MachineState *machine)
{
/* This value depends on the actual DSDT and SSDT compiled into
@@ -514,6 +586,18 @@ static void pc_xen_hvm_init(MachineState *machine)
pci_create_simple(bus, -1, "xen-platform");
}
}
+
+static void xen_igd_passthrough_pc_hvm_init(MachineState *machine)
+{
+ PCIBus *bus;
+
+ xen_igd_passthrough_pc_init_pci(machine);
+
+ bus = pci_find_primary_bus();
+ if (bus != NULL) {
+ pci_create_simple(bus, -1, "xen-platform");
+ }
+}
#endif
#define PC_I440FX_MACHINE_OPTIONS \
@@ -963,6 +1047,27 @@ static QEMUMachine xenfv_machine = {
{ /* end of list */ }
},
};
+
+static QEMUMachine xenigd_machine = {
+ PC_COMMON_MACHINE_OPTIONS,
+ .name = "xenigd",
+ .desc = "Xen Fully-virtualized PC specific to IGD",
+ .init = xen_igd_passthrough_pc_hvm_init,
+ .max_cpus = HVM_MAX_VCPUS,
+ .default_machine_opts = "accel=xen",
+ .hot_add_cpu = pc_hot_add_cpu,
+ .compat_props = (GlobalProperty[]) {
+ /* xenfv has no fwcfg and so does not load acpi from QEMU.
+ * as such new acpi features don't work.
+ */
+ {
+ .driver = "PIIX4_PM",
+ .property = "acpi-pci-hotplug-with-bridge-support",
+ .value = "off",
+ },
+ { /* end of list */ }
+ },
+};
#endif
static void pc_machine_init(void)
@@ -986,6 +1091,7 @@ static void pc_machine_init(void)
qemu_register_pc_machine(&isapc_machine);
#ifdef CONFIG_XEN
qemu_register_pc_machine(&xenfv_machine);
+ qemu_register_pc_machine(&xenigd_machine);
#endif
}
--
1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: Tiejun Chen <tiejun.chen@intel.com>
To: mst@redhat.com
Cc: pbonzini@redhat.com, xen-devel@lists.xensource.com,
qemu-devel@nongnu.org, stefano.stabellini@eu.citrix.com
Subject: [v3][PATCH 4/4] xen:hw:i386:pc_piix: introduce new machine for IGD passthrough
Date: Thu, 31 Jul 2014 20:09:34 +0800 [thread overview]
Message-ID: <1406808574-19728-5-git-send-email-tiejun.chen@intel.com> (raw)
In-Reply-To: <1406808574-19728-1-git-send-email-tiejun.chen@intel.com>
Now we can introduce a new machine, xenigd, specific to IGD
passthrough. This can avoid involving other common codes.
Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
---
hw/i386/pc_piix.c | 106 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 106 insertions(+)
v3:
* Rebase
v2:
* Unify prefix with XEN_IGD_PASSTHROUGH/xen_igd_passthrough like patch #3
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 0c40b06..cde39d6 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -232,6 +232,46 @@ static void pc_machine_pci_bus_init(MachineState *machine,
*pc_isa_bus = isa_bus;
}
+#ifdef CONFIG_XEN
+static void xen_igd_passthrough_pc_machine_pci_bus_init(MachineState *machine,
+ int pci_enabled,
+ PCII440FXState **pc_i440fx_state,
+ int *pc_piix3_devfn,
+ PCIBus **pc_pci_bus,
+ ISABus **pc_isa_bus,
+ qemu_irq *gsi,
+ MemoryRegion *pci_memory,
+ MemoryRegion *ram_memory)
+{
+ MemoryRegion *system_memory = get_system_memory();
+ MemoryRegion *system_io = get_system_io();
+ PCII440FXState *i440fx_state;
+ int piix3_devfn;
+ PCIBus *pci_bus;
+ ISABus *isa_bus;
+
+ if (pci_enabled) {
+ pci_bus = i440fx_init(TYPE_I440FX_PCI_HOST_BRIDGE,
+ TYPE_XEN_IGD_PASSTHROUGH_I440FX_PCI_DEVICE,
+ &i440fx_state, &piix3_devfn, &isa_bus, gsi,
+ system_memory, system_io, machine->ram_size,
+ below_4g_mem_size,
+ above_4g_mem_size,
+ pci_memory, ram_memory);
+ } else {
+ pci_bus = NULL;
+ i440fx_state = NULL;
+ isa_bus = isa_bus_new(NULL, system_io);
+ no_hpet = 1;
+ }
+
+ *pc_i440fx_state = i440fx_state;
+ *pc_piix3_devfn = piix3_devfn;
+ *pc_pci_bus = pci_bus;
+ *pc_isa_bus = isa_bus;
+}
+#endif
+
static void pc_machine_device_init(MachineState *machine,
int pci_enabled,
GSIState *gsi_state,
@@ -368,6 +408,38 @@ static void pc_init_pci(MachineState *machine)
pc_init1(machine, 1, 1);
}
+#ifdef CONFIG_XEN
+static void xen_igd_passthrough_pc_init1(MachineState *machine,
+ int pci_enabled,
+ int kvmclock_enabled)
+{
+ PCIBus *pci_bus = NULL;
+ ISABus *isa_bus = NULL;
+ PCII440FXState *i440fx_state = NULL;
+ int piix3_devfn = -1;
+ qemu_irq *gsi = NULL;
+ GSIState *gsi_state = NULL;
+ MemoryRegion *ram_memory = NULL;
+ MemoryRegion *pci_memory = NULL;
+ DeviceState *icc_bridge = NULL;
+ FWCfgState *fw_cfg = NULL;
+
+ pc_machine_base_init(machine, pci_enabled, kvmclock_enabled, &icc_bridge,
+ &ram_memory, &pci_memory, &gsi, &gsi_state, &fw_cfg);
+ xen_igd_passthrough_pc_machine_pci_bus_init(machine, pci_enabled,
+ &i440fx_state, &piix3_devfn,
+ &pci_bus, &isa_bus, gsi,
+ pci_memory, ram_memory);
+ pc_machine_device_init(machine, pci_enabled, gsi_state, icc_bridge,
+ piix3_devfn, fw_cfg, pci_bus, isa_bus, gsi);
+}
+
+static void xen_igd_passthrough_pc_init_pci(MachineState *machine)
+{
+ xen_igd_passthrough_pc_init1(machine, 1, 1);
+}
+#endif
+
static void pc_compat_2_0(MachineState *machine)
{
/* This value depends on the actual DSDT and SSDT compiled into
@@ -514,6 +586,18 @@ static void pc_xen_hvm_init(MachineState *machine)
pci_create_simple(bus, -1, "xen-platform");
}
}
+
+static void xen_igd_passthrough_pc_hvm_init(MachineState *machine)
+{
+ PCIBus *bus;
+
+ xen_igd_passthrough_pc_init_pci(machine);
+
+ bus = pci_find_primary_bus();
+ if (bus != NULL) {
+ pci_create_simple(bus, -1, "xen-platform");
+ }
+}
#endif
#define PC_I440FX_MACHINE_OPTIONS \
@@ -963,6 +1047,27 @@ static QEMUMachine xenfv_machine = {
{ /* end of list */ }
},
};
+
+static QEMUMachine xenigd_machine = {
+ PC_COMMON_MACHINE_OPTIONS,
+ .name = "xenigd",
+ .desc = "Xen Fully-virtualized PC specific to IGD",
+ .init = xen_igd_passthrough_pc_hvm_init,
+ .max_cpus = HVM_MAX_VCPUS,
+ .default_machine_opts = "accel=xen",
+ .hot_add_cpu = pc_hot_add_cpu,
+ .compat_props = (GlobalProperty[]) {
+ /* xenfv has no fwcfg and so does not load acpi from QEMU.
+ * as such new acpi features don't work.
+ */
+ {
+ .driver = "PIIX4_PM",
+ .property = "acpi-pci-hotplug-with-bridge-support",
+ .value = "off",
+ },
+ { /* end of list */ }
+ },
+};
#endif
static void pc_machine_init(void)
@@ -986,6 +1091,7 @@ static void pc_machine_init(void)
qemu_register_pc_machine(&isapc_machine);
#ifdef CONFIG_XEN
qemu_register_pc_machine(&xenfv_machine);
+ qemu_register_pc_machine(&xenigd_machine);
#endif
}
--
1.9.1
next prev parent reply other threads:[~2014-07-31 12:12 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-31 12:09 [Qemu-devel] [v3][PATCH 0/5] xen: introduce new machine for IGD passthrough Tiejun Chen
2014-07-31 12:09 ` Tiejun Chen
2014-07-31 12:09 ` [Qemu-devel] [v3][PATCH 1/4] i440fx: make types configurable at run-time Tiejun Chen
2014-07-31 12:09 ` Tiejun Chen
2014-08-04 13:48 ` [Qemu-devel] " Michael S. Tsirkin
2014-08-04 13:48 ` Michael S. Tsirkin
2014-08-06 6:18 ` [Qemu-devel] " Chen, Tiejun
2014-08-06 6:18 ` Chen, Tiejun
2014-07-31 12:09 ` [Qemu-devel] [v3][PATCH 2/4] hw:i386:pc_piix: split pc_init1() Tiejun Chen
2014-07-31 12:09 ` Tiejun Chen
2014-08-04 13:48 ` [Qemu-devel] " Michael S. Tsirkin
2014-08-04 13:48 ` Michael S. Tsirkin
2014-08-06 6:19 ` [Qemu-devel] " Chen, Tiejun
2014-08-06 6:19 ` Chen, Tiejun
2014-07-31 12:09 ` [Qemu-devel] [v3][PATCH 3/4] xen:hw:pci-host:piix: create host bridge to passthrough Tiejun Chen
2014-07-31 12:09 ` Tiejun Chen
2014-08-04 13:50 ` [Qemu-devel] " Michael S. Tsirkin
2014-08-04 13:50 ` Michael S. Tsirkin
2014-08-06 6:22 ` [Qemu-devel] " Chen, Tiejun
2014-08-06 6:22 ` Chen, Tiejun
2014-07-31 12:09 ` Tiejun Chen [this message]
2014-07-31 12:09 ` [v3][PATCH 4/4] xen:hw:i386:pc_piix: introduce new machine for IGD passthrough Tiejun Chen
2014-08-04 5:39 ` [Qemu-devel] [Xen-devel] [v3][PATCH 0/5] xen: " Chen, Tiejun
2014-08-04 5:39 ` Chen, Tiejun
2014-08-04 13:51 ` [Qemu-devel] " Michael S. Tsirkin
2014-08-04 13:51 ` Michael S. Tsirkin
2014-08-06 6:26 ` [Qemu-devel] " Chen, Tiejun
2014-08-06 6:26 ` Chen, Tiejun
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1406808574-19728-5-git-send-email-tiejun.chen@intel.com \
--to=tiejun.chen@intel.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=stefano.stabellini@eu.citrix.com \
--cc=xen-devel@lists.xensource.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.