From: Ian Campbell <ijc@hellion.org.uk>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 05/16] sunxi: dram: Remove broken impedance and ODT configuration code
Date: Tue, 05 Aug 2014 07:43:24 +0100 [thread overview]
Message-ID: <1407221004.23472.20.camel@dagon.hellion.org.uk> (raw)
In-Reply-To: <1407033174-24603-6-git-send-email-siarhei.siamashka@gmail.com>
On Sun, 2014-08-03 at 05:32 +0300, Siarhei Siamashka wrote:
> We can safely remove it, because none of the currently supported
> boards uses these features.
>
> The existing implementation had multiple problems:
> - unnecessary code duplication between sun4i/sun5i/sun7i
> - ZQ calibration was never initiated explicitly, and could be
> only triggered by setting the highest bit in the 'zq' parameter
> in the 'dram_para' struct (this was never actually done for
> any of the known Allwinner devices).
> - even if the ZQ calibration could be started, no attempts were
> made to wait for its completion, or checking whether the
> default automatically initiated ZQ calibration is still
> in progress
> - ODT was only ever enabled on sun4i, but not on sun5i/sun7i
>
> Additionally, SDR_IOCR was set to 0x00cc0000 only on sun4i. There
> are some hints in the Rockchip Linux kernel sources, indicating
> that these bits are related to the automatic I/O power down
> feature, which is poorly understood on sunxi hardware at the
> moment. Avoiding to set these bits on sun4i too does not seem to
> have any measurable/visible impact.
>
> The impedance and ODT configuration code will be re-introdeced in
> one of the next comits.
>
> Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
next prev parent reply other threads:[~2014-08-05 6:43 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-03 2:32 [U-Boot] [PATCH v2 00/16] sunxi: Allwinner A10/A13/A20 DRAM controller fixes Siarhei Siamashka
2014-08-03 2:32 ` [U-Boot] [PATCH v2 01/16] sunxi: dram: Remove useless 'dramc_scan_dll_para()' function Siarhei Siamashka
2014-08-03 2:32 ` [U-Boot] [PATCH v2 02/16] sunxi: dram: Remove broken super-standby remnants Siarhei Siamashka
2014-08-05 6:37 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 03/16] sunxi: dram: Respect the DDR3 reset timing requirements Siarhei Siamashka
2014-08-05 6:38 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 04/16] sunxi: dram: Fix CKE delay handling for sun4i/sun5i Siarhei Siamashka
2014-08-05 6:41 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 05/16] sunxi: dram: Remove broken impedance and ODT configuration code Siarhei Siamashka
2014-08-05 6:43 ` Ian Campbell [this message]
2014-08-03 2:32 ` [U-Boot] [PATCH v2 06/16] sunxi: dram: Do DDR3 reset in the same way on sun4i/sun5i/sun7i Siarhei Siamashka
2014-08-05 6:43 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 07/16] sunxi: dram: Add 'await_bits_clear'/'await_bits_set' helper functions Siarhei Siamashka
2014-08-05 6:44 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 08/16] sunxi: dram: Re-introduce the impedance calibration ond ODT Siarhei Siamashka
2014-08-05 6:47 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 09/16] sunxi: dram: Configurable MBUS clock speed (use PLL5 or PLL6) Siarhei Siamashka
2014-08-05 6:49 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 10/16] sunxi: dram: Use divisor P=1 for PLL5 Siarhei Siamashka
2014-08-03 2:32 ` [U-Boot] [PATCH v2 11/16] sunxi: dram: Improve DQS gate data training error handling Siarhei Siamashka
2014-08-03 2:32 ` [U-Boot] [PATCH v2 12/16] sunxi: dram: Add a helper function 'mctl_get_number_of_lanes' Siarhei Siamashka
2014-08-05 6:50 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 13/16] sunxi: dram: Configurable DQS gating window mode and delay Siarhei Siamashka
2014-08-05 6:53 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 14/16] sunxi: dram: Drop DDR2 support and assume only single rank DDR3 memory Siarhei Siamashka
2014-08-05 6:54 ` Ian Campbell
2014-08-03 2:32 ` [U-Boot] [PATCH v2 15/16] sunxi: dram: Derive write recovery delay from DRAM clock speed Siarhei Siamashka
2014-08-03 2:32 ` [U-Boot] [PATCH v2 16/16] sunxi: dram: Autodetect DDR3 bus width and density Siarhei Siamashka
2014-08-05 7:02 ` [U-Boot] [PATCH v2 00/16] sunxi: Allwinner A10/A13/A20 DRAM controller fixes Ian Campbell
2014-08-05 10:00 ` Hans de Goede
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1407221004.23472.20.camel@dagon.hellion.org.uk \
--to=ijc@hellion.org.uk \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.