From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Xen ARM dom0 PCI patches Date: Wed, 29 Oct 2014 17:20:28 +0000 Message-ID: <1414603228.2064.12.camel@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: manish jaggi Cc: xen-devel , Stefano Stabellini List-Id: xen-devel@lists.xenproject.org Hi Manish, Do you have some patches which wire up the PCI related physdev hypercalls (e.g. PHYSDEVOP_pci_device_add) ? In the context of http://lists.xenproject.org/archives/html/xen-devel/2014-10/msg03029.html I've concluded that the approach in the final patch wrt the interrupts-map property is wrong. Instead I would like to use PHYSDEVOP_pci_device_add to map the correct IRQ at registration time (i.e. by reading the PCI CFG PIN register, and then translating according to the spec). However that requires the ability to go from a PCI seg+bus+devfn to a DT node (usually this will be a mapping from seg=>root complex, but not always). Have you implemented that bit? How did you determine the correct mapping? Any chance you could share an initial version of your patches? (Just the host/dom0 side, no need for the passthrough related bits for this particular problem) Ian.