From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH for-4.5] xen/arm: Fix virtual timer on ARMv8 Model Date: Fri, 28 Nov 2014 12:32:55 +0000 Message-ID: <1417177975.23604.34.camel@citrix.com> References: <1416937469-8162-1-git-send-email-julien.grall@linaro.org> <5477671C.4010500@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XuKjM-0005Z2-5P for xen-devel@lists.xenproject.org; Fri, 28 Nov 2014 12:33:00 +0000 In-Reply-To: <5477671C.4010500@linaro.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Julien Grall Cc: xen-devel@lists.xenproject.org, tim@xen.org, stefano.stabellini@citrix.com List-Id: xen-devel@lists.xenproject.org On Thu, 2014-11-27 at 18:02 +0000, Julien Grall wrote: > I propose to reword the commit message into: You'll want to change the code comment too I think. > > xen/arm: Handle platforms with edge-triggered virtual timer > > Some platforms (such as the ARMv8 model) uses edge-triggered interrupt > for the virtual timer. Even if the timer output signal is masked in the > context switch, the GIC will keep track that of any raised interrupt > while the IRQs has been disabled. As soon as the IRQs are re-enabled, > the virtual interrupt timer will be injected to Xen. > > The interrupt handler doesn't except to the receive the IRQ and will > crash if an idle vCPU is running: > > (XEN) [<0000000000228388>] _spin_lock_irqsave+0x28/0x94 (PC) > (XEN) [<0000000000228380>] _spin_lock_irqsave+0x20/0x94 (LR) > (XEN) [<0000000000250510>] vgic_vcpu_inject_irq+0x40/0x1b0 > (XEN) [<000000000024bcd0>] vtimer_interrupt+0x4c/0x54 > (XEN) [<0000000000247010>] do_IRQ+0x1a4/0x220 > (XEN) [<0000000000244864>] gic_interrupt+0x50/0xec > (XEN) [<000000000024fbac>] do_trap_irq+0x20/0x2c > (XEN) [<0000000000255240>] hyp_irq+0x5c/0x60 > (XEN) [<0000000000241084>] context_switch+0xb8/0xc4 > (XEN) [<000000000022482c>] schedule+0x684/0x6d0 > (XEN) [<000000000022785c>] __do_softirq+0xcc/0xe8 > (XEN) [<00000000002278d4>] do_softirq+0x14/0x1c > (XEN) [<0000000000240fac>] idle_loop+0x134/0x154 > (XEN) [<000000000024c160>] start_secondary+0x14c/0x15c > (XEN) [<0000000000000001>] 0000000000000001 > > The proper solution would be context/switching the virtual interrupt > state at the GIC level. This would also avoid masking the output signal > and requires specific handling in the guest OS. > > Sadly, this solution require some refactoring which would miss the Xen > 4.5 release. > > For now implement a temporary solution which ignore the interrupt when > the idle VCPU is running. > > Regards, >