Re: [PATCH v1] xen/arm: Manage pl011 uart TX interrupt correctly

[Ian Campbell <Ian.Campbell@citrix.com>]

On Thu, 2015-01-08 at 14:59 +0000, Ian Campbell wrote:
> On Thu, 2014-12-11 at 13:15 +0100, Tim Deegan wrote:
> > At 10:09 +0530 on 09 Dec (1418116195), vijay.kilari@gmail.com wrote:
> > > From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
> > > 
> > > In pl011.c, when TX interrupt is received
> > > serial_tx_interrupt() is called to push next
> > > characters. If TX buffer is empty, serial_tx_interrupt()
> > > does not disable TX interrupt and hence pl011 UART
> > > irq handler pl011_interrupt() always sees TX interrupt
> > > status set in MIS register and cpu does not come out of
> > > UART irq handler.
> > > 
> > > With this patch, mask TX interrupt by writing 0 to
> > > IMSC register when TX buffer is empty and unmask by
> > > writing 1 to IMSC register before sending characters.
> > > 
> > > Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
> > 
> > Reviewed-by: Tim Deegan <tim@xen.org>
> 
> Since Keir hasn't objected I've now applied, thanks.
> 
> Should this be a candidate for backporting (to 4.4 and/or 4.5)?

It didn't cherry-pick cleanly and since none of the platforms supported
by 4.4 seemed affected I think we should skip it in that tree.

I'll consider it for 4.5 once that opens for backports.

Ian.