From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH] xen/arm: Fix rtds scheduler for arm Date: Mon, 2 Feb 2015 12:16:40 +0000 Message-ID: <1422879400.18204.6.camel@citrix.com> References: <54CB8958020000780005B464@mail.emea.novell.com> <1422632449-23130-1-git-send-email-denys.drozdov@globallogic.com> <54CBA76E.4010808@linaro.org> <54CBA9C4.4070305@citrix.com> <54CBAD05.10800@linaro.org> <1422701456.15317.2.camel@citrix.com> <1422875680.10090.4.camel@citrix.com> <54CF7045020000780005BDF7@mail.emea.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <54CF7045020000780005BDF7@mail.emea.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: George Dunlap , Andrew Cooper , Julien Grall , Denys Drozdov , xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On Mon, 2015-02-02 at 11:40 +0000, Jan Beulich wrote: > >>> On 02.02.15 at 12:14, wrote: > > On Mon, 2015-02-02 at 12:49 +0200, Denys Drozdov wrote: > >> The issue observed on credit2 scheduler is similar to the rt scheduler > >> on arm platform. The root cause is that interrupts are disabled in the > >> beginning of arm context_switch, thus spin_lock_irq is failing in > >> ASSERT(local_irq_is_enabled()). I propose to change both credit2 and > >> rt scheduler to run on arm platform as well and re-run the regression > >> with scheduler patches. > > > > I'd like to hear from the scheduler and other $arch folks regarding > > whether we think the rtds and credit2 schedulers are wrong or whether it > > is actually the ARM arch code which needs fixing before considering any > > change. > > The aspect to be understood first is why ARM needs IRQs disabled > past __context_switch() into schedule_tail() (and there until after > ctxt_switch_from() and ctxt_switch_to()). If that's indeed necessary, > there's no question that the schedulers need to be adjusted to > accommodate for this. I don't think it's *necessary*, but we do seem to have ended up with the context switch having that requirement today (and relying on it in several places in switch from/to (mostly to). I'm pretty sure we could rework things more along the lines of how x86 does it if needed, but it would be a non-trivial refactoring I think. > X86 calls context_saved() before > schedule_tail() and has no need for IRQs to be disabled after > __context_switch() returned. In fact from the comment ("...which may fault...") I think it requires that they are not disabled? > Otoh some roughly equivalent stuff > ARM does in ctxt_switch_{from,to}() is being done in > __context_switch() on x86 (and in the context here the restore > parts seem to be of most interest) - maybe the call to > context_saved() could be deferred on ARM until after IRQs got > re-enabled? Is it allowable to have the context_saved of prev be after (most of) the state of next has been restored? Ian.