From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH v2 01/15] xen/arm: vgic-v3: Correctly set GICD_TYPER.IDbits Date: Mon, 2 Feb 2015 15:15:40 +0000 Message-ID: <1422890140.4801.16.camel@citrix.com> References: <1422555950-31821-1-git-send-email-julien.grall@linaro.org> <1422555950-31821-2-git-send-email-julien.grall@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YIIj3-0004Zb-1a for xen-devel@lists.xenproject.org; Mon, 02 Feb 2015 15:15:45 +0000 In-Reply-To: <1422555950-31821-2-git-send-email-julien.grall@linaro.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Julien Grall Cc: xen-devel@lists.xenproject.org, Vijaya.Kumar@caviumnetworks.com, tim@xen.org, stefano.stabellini@citrix.com List-Id: xen-devel@lists.xenproject.org On Thu, 2015-01-29 at 18:25 +0000, Julien Grall wrote: > From Linux 3.19, the GICv3 drivers is using GICD_TYPER.IDbits to check > the validity of the hardware interrupt number. > > The field IDBits in the register GICD_TYPER is used to know the number of > interrupt identifiers (SPI, PPIs, SGIs, LPIs) supported by GIC Stream Protocol > Interface. > > This field contains the number of interrupt identifier bits minus one. > > Signed-off-by: Julien Grall > > --- > This patch should be backported to Xen 4.5. Without it any Linux > kernel > 3.19 won't boot as a Xen domain. > > I'm wondering if we should add a release note for this bug. > > Changes in v2: > - vgic_num_irqs has been introduced > - Drop GICD_TYPE_ID_BITS_MASK > - Use get_count_order > --- > xen/arch/arm/vgic-v3.c | 11 +++++++++++ > xen/include/asm-arm/gic_v3_defs.h | 3 +++ > 2 files changed, 14 insertions(+) > > diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c > index bece189..72b22ee 100644 > --- a/xen/arch/arm/vgic-v3.c > +++ b/xen/arch/arm/vgic-v3.c > @@ -679,11 +679,22 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v, mmio_info_t *info) > vgic_unlock(v); > return 1; > case GICD_TYPER: > + { > + /* > + * Number of interrupt identifier bits supported by the GIC > + * Stream Protocol Interface > + */ > + unsigned int irq_bits = get_count_order(vgic_num_irqs(v->domain)); > + > if ( dabt.size != DABT_WORD ) goto bad_width; > /* No secure world support for guests. */ > *r = (((v->domain->max_vcpus << 5) & GICD_TYPE_CPUS ) | > ((v->domain->arch.vgic.nr_spis / 32) & GICD_TYPE_LINES)); > + > + *r |= (irq_bits - 1) << GICD_TYPE_ID_BITS_SHIFT; > + > return 1; > + } > case GICD_STATUSR: > /* > * Optional, Not implemented for now. > diff --git a/xen/include/asm-arm/gic_v3_defs.h b/xen/include/asm-arm/gic_v3_defs.h > index 13adb53..85a6d79 100644 > --- a/xen/include/asm-arm/gic_v3_defs.h > +++ b/xen/include/asm-arm/gic_v3_defs.h > @@ -18,6 +18,9 @@ > #ifndef __ASM_ARM_GIC_V3_DEFS_H__ > #define __ASM_ARM_GIC_V3_DEFS_H__ > > +/* Additional bits in GICD_TYPER defined by GICv3 */ > +#define GICD_TYPE_ID_BITS_SHIFT 19 Please put this further down with the other bit definitions (i.e. below the register definitions). With that: Acked-by: Ian Campbell